PNX17XX Datasheet, PDF (794/832 Pages) NXP Semiconductors – Connected Media Processor

Philips Semiconductors
Volume 1 of 1
PNX17xx Series
Chapter 28: Pixel Formats
31
24 23
alpahlpaha
R
31
24 23
alpahlpaha
VR
15
12 11
alpha
R
15
12 11
alpha
R
15
R
16 15
16 15
11 10
G
YG
7
0
i1 i2 i3 i4 i5 i6 i7 i8 1 bpp index
7
0
i1 i2
i3
i4 2 bpp index
7
i1
0
i2
4 bpp index
7
i
87
43
G
B
0
8 bpp index
0
RGBa 4444
76
43
G
0
B
RGBa 4534
54
0
G
B
RGB 565
87
0
B
RGBa 8888
87
0
U
YUVa 444
15
87
1st unit
Y1
U
31
24 23
2nd unit
Y2
V
0
16 ^UYVY
15
1st unit
U
31
2nd unit
V
(For planar YUV 4:2:0 formats, refer to Figure 9 and Figure 10.)
Figure 1: Native Pixel Format Unit Layout
87
0
Y1
YUY2 or
24 23
16 2vuy
Y2
3. Native Pixel Format Representation
3.1 Indexed Formats
The indexed formats support a 1, 2, 4 or 8-bit pixel format. For each of the respective
2, 4, 16 or 256 code values, a full look-up for a 24-bit color and 8-bit alpha is
performed, using a subsystem-specific, programmable color look-up table.
Figure 2 shows the “software view” of the four indexed formats. Packing of pixels
within the byte always uses the “first, left-most pixel in most significant bit(s)” packing
convention. Pixel groups from left to right have increasing memory byte addresses.
PNX17XX_SER_1
Preliminary data sheet
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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