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PNX17XX Datasheet, PDF (237/832 Pages) NXP Semiconductors – Connected Media Processor | |||
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Philips Semiconductors
Volume 1 of 1
PNX17xx Series
Chapter 7: PCI-XIO Module
PNX17XX_SER_1
Preliminary data sheet
Registers
All IDE device registers are deï¬ned in the ATA-2 Speciï¬cation. These registers can be
accessed directly from PI or indirectly via GPXIO registers. The lower ï¬ve bits of the
GPXIO address register need to be conï¬gured as follows:
Table 5: GPXIO Address Conï¬guration
Address to be
Written
Register Name
Address on IDE
CS1 CS0 DA2 DA1 DA0
5âb40
Data register
1
0
0
0
0
5âb44
ERR/Feature
1
0
0
0
1
5âb48
Sector count
1
0
0
1
0
5âb4C
Sector number
1
0
0
1
1
5âb50
Cylinder Low
1
0
1
0
0
5âb54
Cylinder High
1
0
1
0
1
5âb58
Device/Head
1
0
1
1
0
5âb5C
Status/Command
1
0
1
1
1
5âb38
Alternate status/Device 0
1
1
1
0
control
Programming IDE Registers
IDE is a submodule of Document title variable. It shares PCI pins with other XIO
blocks. Three XIO SEL pins can be conï¬gured for use by any XIO device. Each SEL
pin is associated with the proï¬le register in the PCI block. The proï¬le register
determines the mode of the SEL pin, pulse width for control signals and memory
apertures for each mode.
Before accessing any IDE register, the appropriate proï¬le register needs to be
programmed. For example, if XIO_SEL[1] has been used for IDE, the sel1_proï¬le
register needs to be programmed and IDE needs to be enabled.
⢠At power on, the IDE disk will respond in PIO-0 mode only.
⢠Program the appropriate register in PIO-0 mode to set PIO-4 mode.
⢠Using sel1_proï¬le register, set lo and high period of DIOR/DIOW pulses for PIO-4
mode.
⢠High period in selx_proï¬le register is used for the setup time of DA/CS lines with
DIOR/DIOW.
⢠Low period in selx_proï¬le register is used for the lo period of the DIOR/DIOW
pulse.
⢠Hold of DA/CS with respect to DIOR/DIOW is always for one PCI clock.
⢠Recommended values for sel_we_hi and sel_we_lo for PIO-0 mode are 7 and 13,
respectively (assuming a 33 MHz PCI clock).
⢠Recommended values for sel_we_hi and sel_we_lo for PIO-4 mode are 1 and 3
respectively.
Rev. 1 â 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
7-16
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