PNX17XX Datasheet, PDF (404/832 Pages) NXP Semiconductors – Connected Media Processor

Philips Semiconductors
Volume 1 of 1
PNX17xx Series
Chapter 11: QVCP
Table 20: QVCP 1 Registers …Continued
Bit Symbol
Acces
s
Value
Description
27:16 VSYNCS
R/W 0
Vertical Sync Start sets pixel location where Vertical sync starts.
Limitation: VTOTAL+1 >= VSYNCS >=1.
15:12 Unused
-
11:0 VSYNCE
R/W 0
Vertical Sync End sets pixel location where Vertical sync ends.
Limitation: VTOTAL >= VSYNCE >=0.
Control and Interrupt Registers
Offset 0x10 E014
VINTERRUPT
31:28 Unused
-
27:16 VLINTA
R/W 0
Vertical Line Interrupt A sets a vertical line number where an
interrupt will be generated when the scan line matches this value.
The interrupt is monitored by the Event Monitor (EVM).
Limitation: VTOTAL >= VLINTA >=0.
15:12 Unused
-
11:0 VLINTB
R/W 0
Vertical Line Interrupt B sets a vertical line number where an
interrupt will be generated when the scan line matches this value.
The interrupt is monitored by the Event Monitor (EVM).
Limitation: VTOTAL >= VLINTB >=0.
Offset 0x10 E018
FEATURES
31:30 NOOUT
R
0x1
Number of Output channels
29:27 Unused
-
26:24 NOGNSH
R
0x1
Number of GNSHs
23:21 NOPLAN
R
0x1
Number of PLANs (semi planar channels)
20:18 NOLSHR
R
0x1
Number of LSHRs
17:15 NOHSRU
R
0x1
Number of HSRUs
14:12 NOHIST
R
0x1
Number of HISTs
11:9 NOCTI
R
0x1
Number of CTIs
8:6 NOCFTR
R
0x1
Number of CFTRs
5:3 NOCLUTS
R
0x1
Number of CLUTs
2:0 NOLAYERS
R
0x2
Number of layers
Offset 0x10 E01C
DEFAULT BACKGROUND COLOR
31:24 Unused
-
23:16 Upper
R/W 0
Background color of the upper channel (R/Y) (two's complement)
15:8 Middle
R/W 0
Background color of the middle channel (G/U) (two's complement)
7:0 Lower
R/W 0
Background color of the lower channel (B/V) (two's complement)
PNX17XX_SER_1
Preliminary data sheet
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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