PNX17XX Datasheet, PDF (270/832 Pages) NXP Semiconductors – Connected Media Processor

Philips Semiconductors
Volume 1 of 1
PNX17xx Series
Chapter 7: PCI-XIO Module
Table 10: PCI Configuration Registers
Bit Symbol
Acces
s
Value
Description
Offset 0x0040
Power Management Capabilities
31:27 Reserved
R
0x0000
26 d2_support
R
cfg*
1 = Device supports D2 power management state
*Value is determined by pci_setup register.
25 d1_support
R
cfg*
1 = Device supports D1 power management state
*Value is determined by pci_setup register.
24:19 Reserved
R
0
18:16 version
R
010
Indicates compliance with version 1.1 of PM.
15:8 Next Item Pointer
R
00
There are no other extended capabilities.
7:0 Cap_ID
R
01
Indicates this is power management data structure.
Offset 0x0044
PMCSR
31:2 Reserved
R
1:0 pwr_state
RW
power_state. These bits are writable only when the corresponding
bit in the PMC register is enabled
PNX17XX_SER_1
Preliminary data sheet
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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