PNX17XX Datasheet, PDF (146/832 Pages) NXP Semiconductors – Connected Media Processor

Philips Semiconductors
Volume 1 of 1
PNX17xx Series
Chapter 4: Reset
The following Figure 2 pictures the events.
1
2
3
4
clk_dtl_mmio
Watchdog_count 0
1
2
3
45
// FD FE FF
0
watchdog_reset
//
peri_rst_n
//
sys_rst_out_n
//
SYS_RST_OUT_N
//
1: The watchdog count register is programmed
2: The count is happening
3: The count reaches the programmed value and a watchdog reset is issued
4: Both the internal and the external resets are asserted
Figure 2: Watchdog in Non Interrupt Mode
2.2.2 The Interrupt Mode
In this mode, the watchdog timer generates first an interrupt to the TM5250 before a
PNX17xx Series system reset is generated (when a time-out occurs because the
TM5250 does not answer in time to the interrupt). The sequence of operations is
similar to the non interrupt mode.
First TM5250 CPU writes a value different than 0x0 to the WATCHDOG_COUNT
MMIO register. This starts an internal counter from the value 0x0. When the internal
counter reaches the WATCHDOG_COUNT value an interrupt, SOURCE 42 (see
Section 6.2 on page 3-14) is asserted. From here a second internal counter is
started. If this second counter reaches the value previously stored into the
INTERRUPT_COUNT MMIO register then a PNX17xx Series system reset is
asserted. The reset follows then the regular software reset timing, Section 3.2. If the
TM5250 CPU clears the pending interrupt by writing to the INTERRUPT_CLEAR
MMIO register, then the PNX17xx Series system reset is not generated.
The following summarizes the sequence of operations
1. Enable the watchdog interrupt. This includes proper set-up of TM5250 internal
interrupt controller[1] as well as an enable of the INTERRUPT_ENABLE MMIO
register.
2. Initialize the INTERRUPT_COUNT MMIO register with the maximum interrupt
latency authorized before a PNX17xx Series reset is asserted.
3. Start the first counter by writing a nonzero value to the WATCHDOG_COUNT
MMIO register.
4. A write with 0x0 value to the WATCHDOG_COUNT MMIO register will stop the
count. However this is not intended to be used as such.
Remark: A write of any nonzero value other than the current value will reset the count.
However this is not intended to be used as such.
PNX17XX_SER_1
Preliminary data sheet
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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