PNX17XX Datasheet, PDF (388/832 Pages) NXP Semiconductors – Connected Media Processor

Philips Semiconductors
Volume 1 of 1
PNX17xx Series
Chapter 11: QVCP
Table 8: Resource ID Assignment …Continued
ID
Functional Unit
13
CFTR (Color Features)
14
DCTI (Dynamic Color Transient Improvement)
15
PLAN (Semi Planar Channel)
The location of a layer in the overall QVCP address map is shown in Table 9.
Table 9: Register Space Allocation
Address Range
Function
0x0H - 0x1FFH
Global QVCP register space
0x200H - 0x3FFH
Layer 1 register space
0x400H - 0x5FFH
Layer 2 register space
Each functional unit which belongs to a layer occupies a fixed spot within the layer
address range of 0x200H bytes. However the layer assignment of this functional unit
is programmable. It should usually follow the pixel data flow for a specific image
surface through the functional units involved.
Two 32-bit registers, RESOURCE_ID and FU_ASSIGNMENT, are used to assign all
resources to a specific layer address space. One is used to identify the resource to be
assigned. The other register is split up into 4-bit chunks which contain the specific
assignment for the resource identified in the first register. This allows for up to 8
resources of the same kind per functional unit. In this specific QVCP implementation
only a maximum of two of the same kind of each resource is needed for non-pool
resources and only one location is needed for the pooled resource. The remaining
slots are reserved for future implementations. The two registers act as access points
to an internal table which keeps the programmed values. All resources are
programmed through the same two registers. The ID register has to be written first.
28 24 20 16 12 8 4 0
res. res. res. res. res. res. R2 R1
Resource ID
Resource-Layer Assignment Register
Resource ID Register (RID)
Figure 10: Resource Layer and ID
Table 10 outlines the association of a given Rn {n=0..5} value to an address space.
The value of Rn {n=0..5} is equivalent to the MMIO offset bits [12:9].
Table 10: Rn Association
Rn
Address Space
0
Reserved for global QVCP addresses
1
0x200H - 0x3FFH (Layer 1)
2
0x400H - 0x5FFH (Layer 2)
PNX17XX_SER_1
Preliminary data sheet
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
11-31