PNX17XX Datasheet, PDF (305/832 Pages) NXP Semiconductors – Connected Media Processor

Philips Semiconductors
Volume 1 of 1
PNX17xx Series
Chapter 8: General Purpose Input Output Pins
4.5 Signal and Event Monitoring Control Registers for the Timestamp
Units
Table 11: Signal and Event Monitoring Control Registers for the Timestamp Units
Bit Symbol
Acces
s
Value
Description
Offset 0x10,4034-> 0x060 GPIO_EV<4-15>
31:10 Unused
9:2 IO_SEL^a
-
R/W 0
This field selects the GPIO pin or internal global signal to be
monitored. Refer to Section 4.15 for field values.
1:0 EVENT_MODE
R/W 0
Timestamping event mode:
00 - event detection disabled
01 - capture negative edge
10 - capture positive edge
11 - capture either edge
a _{IO_SEL cannot be written to unless timestamping is disabled (EVENT_MODE=00).}
4.6 Timestamp Unit Registers
Table 12: Timestamp Unit Registers
Bit Symbol
Acces
s
Value
Description
Offset 0x10,40C4->0x0F0 TSU<0-11>
31 Direction
R
0
This field indicates the direction of the event which occurred:
0 - a falling edge
1 - a rising edge
30:0 Timestamp
R
0
This field holds the 31-bit timestamp.
4.7 GPIO Time Counter
Table 13: GPIO Time Counter
Bit Symbol
Acces
s
Value
Description
Offset 0x10,40F4
TIME_CTR
31 Unused
-
30:0 TIME_CTR
R
0
GPIO master time counter. This counter is incremented at a
frequency of 13.5 MHz.
PNX17XX_SER_1
Preliminary data sheet
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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