PNX17XX Datasheet, PDF (486/832 Pages) NXP Semiconductors – Connected Media Processor

Philips Semiconductors
Volume 1 of 1
PNX17xx Series
Chapter 13: FGPO: Fast General Purpose Output
Table 4: Status Registers
Bit Symbol
Acces
s
Value
Standard Registers
Offset 0x07,1FE0
FGPO_IR_STATUS
31:8 Reserved
R
0
7
BUF1_ACTIVE
6
Reserved
R
0
R
0
5
MBE
R
0
4
UNDERRUN
R
0
3
THRESH2_REACHED R
0
2
THRESH1_REACHED R
0
1
BUF2_DONE
R
0
0
BUF1_DONE
R
0
Offset 0x07,1FE4
FGPO_IR_ENA
31:6 Reserved
R
0
5
MBE_ENA
R/W 0
4
UNDERRUN_ENA
R/W 0
3
THRESH2_REACHED_ R/W 0
ENA
2
THRESH1_REACHED_ R/W 0
ENA
1
BUF2_DONE_ENA
R/W 0
0
BUF1_DONE_ENA
R/W 0
Offset 0x07,1FE8
FGPO_IR_CLR
31:6 Reserved
R
0
5
MBE_ACK
R/W 0
4
UNDERRUN_ACK
R/W 0
3
THRESH2_REACHED_ R/W 0
ACK
2
THRESH1_REACHED_ R/W 0
ACK
1
BUF2_DONE_ACK
R/W 0
0
BUF1_DONE_ACK
R/W 0
Offset 0x07,1FEC
FGPO_IR_SET
31:6 Reserved
R
0
5
MBE_SET
4
UNDERRUN_SET
R/W 0
R/W 0
Description
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
1 when Buffer 1 is active
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Memory Bandwidth Error detected.
Buffer Underrun detected.
Buffer 2 Threshold reached.
Buffer 1 Threshold reached.
Buffer 2 done.
Buffer 1 done.
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Memory Bandwidth Error Interrupt Enable
Buffer Underrun Interrupt Enable
Buffer 2 Threshold Interrupt Enable
Buffer 2 Threshold Interrupt Enable
Buffer 2 done Interrupt Enable
Buffer 1 done Interrupt Enable
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Memory Bandwidth Error Interrupt Acknowledge
Buffer Underrun Interrupt Acknowledge
Buffer 2 Threshold Interrupt Acknowledge
Buffer 2 Threshold Interrupt Acknowledge
Buffer 2 done Interrupt Acknowledge
Buffer 1 done Interrupt Acknowledge
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Set Memory Bandwidth Error Interrupt
Set Buffer Underrun Interrupt
PNX17XX_SER_1
Preliminary data sheet
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
13-21