OXCFU950_07 Datasheet, PDF (51/74 Pages) Oxford Semiconductor – USB/UART multi-function 16-bit PC Card device

OXFORD SEMICONDUCTOR, INC.
Level 6:
CTS or RTS changed interrupt (ISR[5:0]=100000):
This interrupt is set whenever either of the CTS# or RTS#
pins changes state from low to high. It is cleared on an ISR
read of a level 6 interrupt.
8.6.4 UART Power Saving
UART power saving is facilitated by the OXCFU950
selectively disabling the clock supplied to the OXCFU950
UART core.
The wake-up signal can be sensitive to any of the following
events
• Falling edge of RI
• Delta CTS
• Delta DSR
• Delta DCD
The sensitivity to each of these events is controlled by the
modem disable mask register (MDM)
The MDM register is located at offset 0x0E of the ICR
This register is cleared after a hardware reset to maintain
compatibility with 16C550. It allows the user to mask
interrupts and control wake-up operation due to individual
modem lines.
OXCFU950 DATA SHEET
To initiate UART power saving correctly:
• Ensure there are no outstanding interrupts
• Set MDM to enable the desired wake-up events (e.g.
set to 0x0B for RI sensitivity only). This may be set
up permanently elsewhere if different sensitivity for
the modem status interrupt is not required under
normal running operation
• Read the MSR
• Read the MSR again, to ensure all events have been
cleared down
• Disable the UART clock to enable the wake-up route
through to an interrupt (logic outside UART core)
To exit power saving:
• Re-enable the UART clock to disable the wake-up
route to an interrupt (logic outside UART core)
• Perform a read access from the UART to ensure that
enough clocks have occurred to update registered
versions of the modem status lines. A suitable access
with no side-effects would be to read SPR. If modem
status is unimportant, the MSR could be read instead
• Read the MSR to clear the wake-up signal, subject to
no other events occurring. Note: because the event
occurred while the clock was turned off, a multiple
change (glitch) on any of the modem lines may have
triggered the wake-up, but the event may be missed
and thus not recorded in the modem status register.
8.7 Modem Interface
8.7.1 Modem Control Register—MCR
MCR[0]: DTR
logic 0 ⇒ Force DTR# output to inactive (high).
logic 1 ⇒ Force DTR# output to active (low).
Note that DTR# can be used for automatic out-of-band flow
control when enabled using ACR[4:3] (see section 8.11.3).
MCR[1]: RTS
logic 0 ⇒ Force RTS# output to inactive (high).
logic 1 ⇒ Force RTS# output to active (low).
Note that RTS# can be used for automatic out-of-band flow
control when enabled using EFR[6] (see section 8.9.4).
MCR[2]: OUT1
logic 0 ⇒ Force OUT1# output low when loopback mode
is disabled.
logic 1 ⇒ Force OUT1# output high.
OUT1# is not bonded out in the OXCFU950, but is used
internally for loopback testing.
MCR[3]: OUT2
logic 0 ⇒ Force OUT2# output low when loopback mode
is disabled.
logic 1 ⇒ Force OUT2# output high.
OUT2# is not bonded out in the OXCFU950, but is used
internally for loopback testing.
MCR[4]: Loopback mode
logic 0 ⇒ Normal operating mode.
logic 1 ⇒ Enable local loop-back mode (diagnostics).
In local loop-back mode, the transmitter output (SOUT) and
the modem outputs (DTR#, RTS#) are set inactive (high),
and the receiver inputs SIN, CTS#, DSR#, DCD#, and RI#
are all disabled. Internally the transmitter output is
connected to the receiver input and DTR#, RTS#, OUT1#
and OUT2# are connected to modem status inputs DSR#,
CTS#, RI# and DCD# respectively.
DS-0023 February 2007
External—Free Release
Page 51 of 74