OXCFU950_07 Datasheet, PDF (11/74 Pages) Oxford Semiconductor – USB/UART multi-function 16-bit PC Card device

OXFORD SEMICONDUCTOR, INC.
OXCFU950 DATA SHEET
4 PIN DESCRIPTIONS
Pin Number
Pad Type^{Note 1}
Pin Name
PC Card/Compact Flash Interface & Control^{Note 2}
14,16,17,18,21,22,23, I_C_33_5_N_ A[10:0]
25,29,31, 34
13,11,9,46,44,42,40,38 B_T_33_5_N_2_ D[15:0]
,10,8,6,45,43,41,39,37
15
I_C_33_5_N_ REG#
35,36
I_C_33_5_N_ CE[2:1]#
33
I_C_33_5_N_ OE#
26
I_C_33_5_N_ WE#
32
I_C_33_5_N_ IORD#
30
I_C_33_5_N_ IOWR#
7
O_T_33_1
WP
Description
PC Card/CompactFlash address bus, bits [10:0]
PC Card/CompactFlash data bidirectional bus.
Register select and I/O enable.
Active-low card enable.
Active-low output enable used to gate memory read data (attribute
memory). Host must negate the OE# signal during write operations.
Active-low write enable used for strobing memory write data (attribute
memory).
Active-low I/O read enable.
Active-low I/O write enable.
Write protect (in memory-only mode).
IOIS16#
Data is 16-bit (in I/O & memory mode).
19
I_C_33_5_S_
RESET
PC Card/CompactFlash reset.
Note : This pin requires an external reset pulse generator (RC network)
to allow for the startup time for the internal oscillator and PLL.
24
O_T_33_2
READY
Device ready (in memory-only mode).
IREQ#
Active-low Interrupt request (in I/O & memory mode). Indicates to the
host system that the PC Card/CF requires host software service. Note:
interrupt can support level or pulsed types.
12
O_T_33_2
BVD1
Battery voltage detect 1 (in memory-only mode). Not supported so held
static.
5,28,47
P_33
UART (MODEM) Function^Note3
58
O_T_33_1
STSCHG#
PCMCIA_VDD3V3
Active-low status-changed pin (in memory & I/O mode). Used to alert the
host system that the card status has changed. In this case it means that
a function’s ready state has changed. The host should check this by
considering each function’s PRR.
Connected internally.
SOUT
UART serial data output.
IrDA_Out
UART IrDA data output when MCR[6] set in enhanced mode.
53
I_C_33_5_N_ SIN
UART serial data input.
IrDA_In
UART IrDA data input when IrDA mode is enabled (see above).
56
I_C_33_5_N_ DCD#
Active-low modem data-carrier-detect input.
60
O_T_33_1
DTR#
Active-low modem data-terminal-ready output. If automated DTR# flow
control is enabled, the DTR# pin is asserted & deasserted if the receiver
FIFO reaches or falls below the programmed thresholds.
485_En
In RS485 half-duplex mode, the DTR# pin may be programmed to reflect
the state of the transmitter empty bit to control the direction of the RS485
transceiver buffer automatically (see register ACR[4:3]).
59
O_T_33_1
RTS#
Active–low modem request-to-send output. If automated RTS# flow
control is enabled, the RTS# pin is de-asserted & reasserted when the
receiver FIFO reaches or falls below the programmed thresholds.
54
I_C_33_5_N_ CTS#
Active-low modem clear-to-send input. If automated CTS# flow control is
enabled, upon de-assertion of the CTS# pin the transmitter completes
the current character & enters idle mode until the CTS# pin is
reasserted. Note: flow control characters are transmitted regardless of
the state of the CTS# pin.
55
I_C_33_5_N_ DSR#
Active-low modem data-set-ready input. If automated DSR# flow control
DS-0023 February 2007
External—Free Release
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