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OXCFU950_07 Datasheet, PDF (23/74 Pages) Oxford Semiconductor – USB/UART multi-function 16-bit PC Card device
OXFORD SEMICONDUCTOR, INC.
OXCFU950 DATA SHEET
6.7 PC Card/CompactFlash Function Configuration Registers
Each function supplied by a 16-bit PC Card or CompactFlash/CF+ card must implement function configuration registers (FCRs).
These registers allow the host to configure the function provided by the card, and are mapped into the attribute memory space at
the location specified within the CONFIG tuple for that function in the CIS. The CONFIG tuple defines a base address for the
FCRs and also shows which FCRs are supported by that function. The registers supported in the OXCFU950 are shown in the
following table.
Offset from FCR
base address
0x00
0x02
0x04
0x06
0x0A
0x0C
Attribute memory
address (USB)
0x300
0x302
0x304
0x306
0x30A
0x30C
Attribute memory
address (UART)
0x200
0x202
0x204
0x206
0x20A
0x20C
Register
Configuration options register
Configuration & status register
Pin replacement register
Socket & copy register
I/O base address register 0
I/O base address register 1
Table 5: Configuration Register Mapping
The definition of each configuration register is detailed below.
6.7.1 Configuration Options Register—COR (Offset 0x00)
The configuration options register is used to configure 16-bit PC Card and CompactFlash/CF+ cards that have programmable
address decoders. When the card client driver has successfully parsed the CIS, it attempts to obtain system resources as
requested by the CIS. On completion of this it assigns the resources to the card via the COR. The COR format and description is
given in Table 6.
D7
D6
D5
D4
D3
D2
D1
D0
SRESET
LevIREQ
Function Configuration Index
Field
Type Description
SRESET
R/W Software reset
Setting this field to ‘1’ places the card in the reset state. This is equivalent to setting the RESET
signal (on pin) except this SRESET field is not reset.
Returning this field to ‘0’ leaves the card in the same un-configured, reset state as the card would
be following a power-up and hard reset.
LevIREQ1
R/W Level Mode IREQ#
Setting this field to ‘1’ enables level type interrupts
Setting this field to ‘0’ enables pulse type interrupts
Function Configuration Index R/W Configuration Index
The host sets this field to the value of the Configuration Entry Number field of a Configuration Table
Entry tuple as defined in the CIS. On setting the non-zero value in this field the function IO is
enabled and IO accesses are allowed. When the field is set to zero (e.g. after a hard reset) the card
will be configured to memory only mode and all IO accesses will be ignored by the card.
Table 6: Configuration Option Register
Note 1
The default tuples in the CIS tell the host that only level type interrupts are supported, to allow lowest power consumption. The
OXCFU950 supports both level and pulse type interrupts, and if a particular manufacturer requires to use pulse type, or both,
then the CIS can be modified using the internal EEPROM.
DS-0023 February 2007
External—Free Release
Page 23 of 74