OXCFU950_07 Datasheet, PDF (35/74 Pages) Oxford Semiconductor – USB/UART multi-function 16-bit PC Card device

OXFORD SEMICONDUCTOR, INC.
7 USB HOST CONTROLLER
This datasheet assumes the reader has access to the
public domain OHCI specification 1.0A, which is freely
downloadable from the internet. It also assumes the reader
has access to the USB Specification 2.0.
Both documents can be downloaded from
http://www.usb.org/developers/docs/
The OXCFU950 includes an embedded OHCI USB Host
controller. The OHCI specification defines a standard way
for a host system (e.g. a PCMCIA 16-bit PC Card host,
such as a desktop or Laptop PC) to control a USB host.
The OHCI specification defines a number of 32-bit registers
and a data structure that exists in memory, to which both
the host system and the USB host controller have access.
The OXCFU950 CF interface does not support DMA-to-
host memory, so an area of memory (the USB memory) is
included on-chip and made available to the host system via
the CompactFlash interface interface.
The register set is mainly used during the setup of the USB
host controller, and is not used a great deal during normal
operation. The memory is accessed by both the OHCI
controller and the CompactFlash interface host throughout
USB operation.
The OHCI specification assumes that both the memory and
registers can be accessed via 32-bit atomic operations.
This is not possible via the CompactFlash/CF+ or PCMCIA
16-bit PC Card interfaces, because only 8-bit and 16-bit
operations are available. This could lead to problems,
because the USB host controller assumes that the host PC
uses 32-bit atomic operations to update the registers and
the memory, when the host PC is making two 16-bit
accesses or 4 8-bit accesses. Therefore, for a short time
the 32-bit value consists of a number of bits of old data and
a number of bits of new data—in effect, invalid data is
potentially present in the USB registers.
OXCFU950 DATA SHEET
To avoid this situation, an indirect access mechanism is
used to allow the host PC to make atomic 32-bit accesses
to the memory and USB register set. It allows the host PC
to enter all details of the read or write operation, following
which the device performs the operation in a single step.
However, USB memory is also mapped into common
memory space to allow the host PC to perform DMAs into
the common memory area when there is no risk of the USB
host controller reading invalid data.
The indirect mechanism is also used to access the USB
OHCI register set.
For details of the operation of OHCI compatible USB hosts,
refer to the OHCI standard.
The USB host controller can be accessed via I/O space
registers at offset 0x20 through 0x40, as shown below.
DS-0023 February 2007
External—Free Release
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