OXCFU950_07 Datasheet, PDF (25/74 Pages) Oxford Semiconductor – USB/UART multi-function 16-bit PC Card device

OXFORD SEMICONDUCTOR, INC.
OXCFU950 DATA SHEET
6.7.3 Pin Replacement Register—PRR (Offset 0x04)
The pin replacement register is implemented to provide information about READY, WP or the BVD[2..1] status when
implementing the I/O interface.
D7
CBVD1
D6
CBVD2
D5
CREADY
D4
CWProt
D3
RBVD1
D2
RBVD2
D1
RREADY
D0
RWProt
Field
CBVD1
CBVD2
CREADY
CWProt
RBVD1
Description
This bit is set (1) when the corresponding bit, RBVD1, changes state. This bit may also be written by the host. Not used: 0
This bit is set (1) when the corresponding bit, RBVD2, changes state. This bit may also be written by the host. Not used: 0
This bit is set (1) when the corresponding bit, RREADY, changes state. This bit may also be written by the host.
This bit is set (1) when the corresponding bit, RWProt, changes state. This bit may also be written by the host. Not used: 0
When read, this bit represents the internal state of the Battery Voltage Detect circuits on the BVD1 pin. Not used: 1
RBVD2
When this bit is written as 1 the corresponding CBVD1 bit is also written. When this bit is written as 0, the CBVD1 bit is
unaffected.
When read, this bit represents the internal state of the Battery Voltage Detect circuits on the BVD2 pin. Not used: 1
RREADY
When this bit is written as 1 the corresponding CBVD2 bit is also written. When this bit is written as 0, the CBVD2 bit is
unaffected.
When read, this bit represents the internal state of the READY signal. This bit may also be used to determine the state of
READY as that pin has been relocated for use as Interrupt Request on IO Cards.
RWProt
When this bit is written as 1 the corresponding changed bit is also written. When this bit is written as 0, the changed bit is
unaffected.
When read, this bit represents the state of the WP signal. This signal may also be used to determine the state of the Write
Protect switch when pin 33 is being used for IOIS16#. Not used: 0
6.7.4
When this bit is written as 1 the corresponding changed bit is also written. When this bit is written as 0, the changed bit is
unaffected.
Table 8: Pin Replacement Register
Socket & Copy Register—SCR (Offset 0x06)
This is an optional read/write register implemented by the OXCFU950, which the 16-bit PC Card or CompactFlash/CF+ card may
use to distinguish between similar cards installed in a system. This register is always written by the system before writing the
card Function Configuration Index field in the COR.
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
Copy Number
Socket Number
Field
Reserved
Copy Number
Socket Number
Description
This bit is reserved for future standardization. This bit must be set to zero (0) by software when the register is written.
16-bit PC Card and CompactFlash/CF+ cards that indicate in their CIS that they support more than one copy of identically
configured cards, should have a copy number (0 to MAX twin cards, MAX = n-1) written back to the SCR.
This field indicates to the card that it is the n’th copy of the card installed in the system, which is identically configured.
The first card installed receives the value 0. This permits identical cards designed to share a common set of I/O ports
while remaining uniquely identifiable and consecutively ordered.
This field indicates to the 16-bit PC Card and CompactFlash/CF+ card that it is located in the n’th socket. The first socket
is numbered 0. This permits any cards designed to do so to share a common set of I/O ports while remaining uniquely
identifiable.
Table 9: Socket and Copy Register
DS-0023 February 2007
External—Free Release
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