OX16PCI954_05 Datasheet, PDF (47/73 Pages) Oxford Semiconductor – Integrated Quad UART and PCI interface

OXFORD SEMICONDUCTOR LTD.
7.10.4 External 1x Clock Mode
The transmitter and receiver can accept an external clock
applied to the RI# and DSR# pins respectively. The clock
options are selected using the CKS register (see section
7.11.8). The transmitter and receiver may be configured to
operate in 1x (i.e. Isochronous mode) by setting CKS[7]
and CKS[3], respectively. In Isochronous mode, transmitter
or receiver will use the 1x clock (usually, but not
necessarily, an external source) where asynchronous
framing is maintained using start-, parity- and stop-bits.
However serial transmission and reception is synchronised
to the 1x clock. In this mode asynchronous data may be
transmitted at baud rates up to 60Mbps. The local 1x clock
source can be asserted on the DTR# pin.
Note that line drivers need to be capable of transmission at
data rates twice the system clock used (as one cycle of the
system clock corresponds to 1 bit of serial data). Also note
that enabling modem interrupts is illegal in isochronous
mode, as the clock signal will cause a continuous change
to the modem status (unless masked in MDM register, see
section 7.11.10).
7.10.5 Crystal Oscillator Circuit
The UARTs reference reference clock may be provided by
its own crystal oscillator or directly from a clock source
OX16PCI954
connected to the XTLI pin. The circuit required to use the
internal oscillator is shown in Figure 3.
XTLO
R₂
C₁
R₁
XTLI
C₂
Figure 3: Crystal Oscillator Circuit
Frequency
Range
(MHz)
1.8432 - 8
8-60
C1
(pF)
68
33-68
C2 (pF)
22
33 – 68
R1 (Ω)
220k
220k-2M2
Table 29: Component values
R2 (Ω)
470R
470R
Note: For better stability use a smaller value of R1.
Increase R1 to reduce power consumption.
The total capacitive load (C1 in series with C2) should be
that specified by the crystal manufacturer (nominally 16pF).
7.11 Additional Features
7.11.1 Additional Status Register ‘ASR’
ASR[0]: Transmitter disabled
logic 0 ⇒ The transmitter is not disabled by in-band flow
control.
logic 1 ⇒ The receiver has detected an XOFF, and has
disabled the transmitter.
ASR[2]: RTS
This is the complement of the actual state of the RTS# pin
when the device is not in loopback mode. The driver
software can determine if the remote transmitter is disabled
by RTS# out-of-band flow control by reading this bit. In
loopback mode this bit reflects the flow control status rather
than the pin’s actual state.
This bit is cleared after a hardware reset or channel
software reset. The software driver may write a 0 to this bit
to re-enable the transmitter if it was disabled by in-band
flow control. Writing a 1 to this bit has no effect.
ASR[1]: Remote transmitter disabled
logic 0 ⇒ The remote transmitter is not disabled by in-
band flow control.
logic 1 ⇒ The transmitter has sent an XOFF character, to
disable the remote transmitter (cleared when
subsequent XON is sent).
This bit is cleared after a hardware reset or channel
software reset. The software driver may write a 0 to this bit
to re-enable the remote transmitter (an XON is
transmitted). Note: writing a 1 to this bit has no effect.
ASR[3]: DTR
This is the complement of the actual state of the DTR# pin
when the device is not in loopback mode. The driver
software can determine if the remote transmitter is disabled
by DTR# out-of-band flow control by reading this bit. In
loopback mode this bit reflects the flow control status rather
than the pin’s actual state.
ASR[4]: Special character detected
logic 0 ⇒ No special character has been detected.
logic 1 ⇒ A special character has been received and is
stored in the RHR.
This can be used to determine whether a level 5 interrupt
was caused by receiving a special character rather than an
XOFF. The flag is cleared following the read of the ASR.
DS-0029 Jul 05
External—Free Release
Page 47