OX16PCI954_05 Datasheet, PDF (20/73 Pages) Oxford Semiconductor – Integrated Quad UART and PCI interface

OXFORD SEMICONDUCTOR LTD.
OX16PCI954
6.4.2 Multi-purpose I/O Configuration register ‘MIC’ (Offset 0x04)
This register configures the operation of the multi-purpose I/O pins ‘MIO[11:0] as follows.
Bits
Description
1:0
MIO0 Configuration Register (Mode[1:0]≠‘01’).
00 -> MIO0 is a non-inverting input pin
01 -> MIO0 is an inverting input pin
10 -> MIO0 is an output pin driving ‘0’
11 -> MIO0 is an output pin driving ‘1’
Read/Write
EEPROM
PCI
W
RW
Unused (Mode[1:0]=‘01’). When Parallel Port is enabled, MIO[0] pin is
unused and will remain in forcing output mode.
3:2
MIO1 Configuration Register (LCC[6:5]=‘00’).
W
RW
00 -> MIO1 is a non-inverting input pin
01 -> MIO1 is an inverting input pin
10 -> MIO1 is an output pin driving ‘0’
11 -> MIO1 is an output pin driving ‘1’
Unused (LCC[6:5] ≠‘00’). When power-down mode in Function0 is
enabled, MIO1 pin is unused and will remain in forcing output mode.
5:4
MIO2 Configuration Register (LCC[7]=’0’).
W
RW
00 -> MIO2 is a non-inverting input pin
01 -> MIO2 is an inverting input pin
10 -> MIO2 is output pin driving ‘0’
11 -> MIO2 is output pin driving ‘1’
PME_Input (LCC[7]=’1’). When LCC[7] is set, MIO2 pin is re-defined to
PME_Input. It’s polarity will be controlled by MIC[4]. It sets the sticky
PME_Status bit in Function1.
7:6
MIO3 Configuration Register.
W
RW
00 -> MIO3 is a non-inverting input pin
01 -> MIO3 is an inverting input pin
10 -> MIO3 is an output pin driving ‘0’
11 -> MIO3 is an output pin driving ‘1’
9:8
MIO4 Configuration Register.
W
RW
00 -> MIO4 is a non-inverting input pin
01 -> MIO4 is an inverting input pin
10 -> MIO4 is an output pin driving ‘0’
11 -> MIO4 is an output pin driving ‘1’
11:10
MIO5 Configuration Register.
W
RW
00 -> MIO5 is a non-inverting input pin
01 -> MIO5 is an inverting input pin
10 -> MIO5 is an output pin driving ‘0’
11 -> MIO5 is an output pin driving ‘1’
13:12
MIO6 Configuration Register.
W
RW
00 -> MIO6 is a non-inverting input pin
01 -> MIO6 is an inverting input pin
10 -> MIO6 is an output pin driving ‘0’
11 -> MIO6 is an output pin driving ‘1’
15:14
MIO7 Configuration Register.
W
RW
00 -> MIO7 is a non-inverting input pin
01 -> MIO7 is an inverting input pin
10 -> MIO7 is an output pin driving ‘0’
11 -> MIO7 is an output pin driving ‘1’
DS-0029 Jul 05
External—Free Release
Reset
00
00
00
00
00
00
00
00
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