OX16PCI954_05 Datasheet, PDF (11/73 Pages) Oxford Semiconductor – Integrated Quad UART and PCI interface

OXFORD SEMICONDUCTOR LTD.
OX16PCI954
Mode
Dir¹
00
01
10
11
Parallel port
N/A 122
N/A
I
Name
ACK#
N/A 121
N/A
N/A 120
N/A
I INTR#
I PE
I BUSY
I ^WAIT#
N/A 108
N/A
OD SLIN#
O ADDRSTB#
N/A 119
N/A
I SLCT
N/A 118
N/A
I ERR#
N/A 107
N/A
OD INIT#
O INIT#
N/A 106
N/A
OD AFD#
O DATASTB#
N/A 105
N/A
OD STB#
N/A Bus
32-bit Local bus
N/A
N/A
N/A
N/A
N/A 122
N/A 123
N/A 102
O WRITE#
I/O PD[7:0]
O LBRST
O LBRST#
O LBDOUT
N/A
See _N/A
8-bit
local
bus ^N/A
N/A
N/A
N/A
N/A 109
N/A 114-7
N/A 112
O LBCLK
O LBCS[3:0]#
O _LBDS[3:0]#
O LBWR#
N/A 113
O ^LBRDWR#
O LBRD#
Z Hi-Z
N/A ^76-9,
105-8,
O LBA[12:0]
118-121
N/A ^47-55, I/O LBD[31:0]
58-61,
66-68,
80-87,
92-95,
98-101
Description
Acknowledge (SPP mode). ACK# is asserted (low) by the
peripheral to indicate that a successful data transfer has
taken place.
Identical function to ACK# (EPP mode).
Paper Empty. Activated by printer when it runs out of paper.
Busy (SPP mode). BUSY is asserted (high) by the peripheral
when it is not ready to accept data
Wait (EPP mode). Handshake signal for interlocked IEEE
1284 compliant EPP cycles.
Select (SPP mode). Asserted by host to select the peripheral
Address strobe (EPP mode) provides address read and write
strobe
Peripheral selected. Asserted by peripheral when selected.
Error. Held low by the peripheral during an error condition.
Initialize (SPP mode). Commands the peripheral to initialize.
Initialize (EPP mode). Identical function to SPP mode.
Auto Feed (SPP mode, open-drain)
Data strobe (EPP mode) provides data read and write strobe
Strobe (SPP mode). Used by peripheral to latch data
currently available on PD[7:0]
Write (EPP mode). Indicates a write cycle when low and a
read cycle when high
Parallel data bus
Local bus active-high reset
Local bus active-low reset
Local bus data out enable. This pin can be used by external
transceivers; it is high when LBD[7:0] are in output mode and
low when they are in input mode.
Buffered PCI clock. Can be enabled / disabled by software
Local bus active-low Chip-Select (Intel mode)
Local bus active-low Data-Strobe (Motorola mode)
Local Bus active-low write-strobe (Intel mode)
Local Bus Read-not-Write control (Motorola mode)
Local Bus active-low read-strobe (Intel mode)
Permanent high impedance (Motorola mode)
Local bus address signals
Local bus data signals
DS-0029 Jul 05
External—Free Release
Page 11