AR0330 Datasheet, PDF (6/77 Pages) ON Semiconductor – CMOS Digital Image Sensor

AR0330: 1/3-Inch CMOS Digital Image Sensor
General Description
General Description
The AR0330 can be operated in its default mode or programmed for frame size, expo-
sure, gain, and other parameters. The default mode output is a 2304 x 1296 image at 60
frames per second (fps). The sensor outputs 10- or 12-bit raw data, using either the
parallel or serial (HiSPi, MIPI) output ports.
Functional Overview
The AR0330 is a progressive-scan sensor that generates a stream of pixel data at a
constant frame rate. It uses an on-chip, phase-locked loop (PLL) that can generate all
internal clocks from a single master input clock running between 6 and 27 MHz. The
maximum output pixel rate is 196 Mp/s using a 4-lane HiSPi or MIPI serial interface and
98 Mp/s using the parallel interface. Figure 1 shows a block diagram of the sensor.
Figure 1: Block Diagram
Ext
Clock
PLL
Analog Core
Timing
and
Control
Registers
Column
Pixel Array _Amplifiers
ADC
12-bit
Two-wire serial I/F
Digital Core
Row Noise Correction
Black Level Correction
Digital Gain
Data Pedestal
Test Pattern
Generator
12-bit
12-bit
Output Data-Path
Compression (optional)
12-bit
8, 10, or
12-bit
10 or 12-bit
Parallel I/O:
PIXCLK, FV,
LV, DOUT [11:0]
MIPI I/O:
CLK P/N,
DATA [1:4] P/N
Max 98 Mp/s Max 196 Mp/s
over 4 lanes
(588 Mbps/lane)
HiSPi I/O:
SLVS C P/N,
SLVS [3:0] P/N
Max 196 Mp/s
over 4 lanes
(588 Mbps/lane)
User interaction with the sensor is through the two-wire serial bus, which communi-
cates with the array control, analog signal chain, and digital signal chain. The core of the
sensor is a 3.4Mp active- pixel sensor array. The timing and control circuitry sequences
through the rows of the array, resetting and then reading each row in turn. In the time
interval between resetting a row and reading that row, the pixels in the row integrate
incident light. The exposure is controlled by varying the time interval between reset and
readout. Once a row has been read, the signal from the column is amplified in a column
amplifier and then digitized in an analog-to-digital converter (ADC). The output from
the ADC is a 12-bit value for each pixel in the array. The ADC output passes through a
digital processing signal chain (which provides further data path corrections and applies
digital gain).
AR0330_DS Rev. U Pub. 4/15 EN
6
©Semiconductor Components Industries, LLC,2015.