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AR0330 Datasheet, PDF (22/77 Pages) ON Semiconductor – CMOS Digital Image Sensor
AR0330: 1/3-Inch CMOS Digital Image Sensor
Electrical Characteristics
Table 16:
I/O Timing
fEXTCLK = 24 MHz; VDD = 1.8V; VDD_IO = 1.8V; VAA = 2.8V; VAA_PIX = 2.8V; VDD_PLL = 2.8V;
Output load = 68.5pF; TJ = 60°C; CLK_OP = 98 MPixel/s
Symbol
fEXTCLK
tEXTCLK
tR
Definition
Input clock frequency
Input clock period
Input clock rise time
Conditions Min
PLL enabled
6
PLL enabled 166
0.5
0.5
tF
Input clock fall time
Clock duty cycle
45
tJITTER
Input clock jitter
–
Output pin slew Fastest
CLOAD = 15pF
–
fPIXCLK
PIXCLK frequency
Default
–
tPD
PIXCLK to data valid
Default
–
tPFH
PIXCLK to FRAME_VALID HIGH Default
–
tPLH
PIXCLK to LINE_VALID HIGH
Default
–
tPFL
PIXCLK to FRAME_VALID LOW Default
–
tPLL
PIXCLK to LINE_VALID LOW
Default
–
Typ Max Units
24
27 MHz
41
20
ns
–
Sine
ns
wave
rise time
–
Sine
ns
wave fall
time
50
55
%
–
0.3
ns
0.7
–
V/ns
80
–
MHz
–
3
ns
–
3
ns
–
3
ns
–
3
ns
–
3
ns
Table 17:
Parallel I/O Rise Slew Rate
fEXTCLK = 24 MHz; VDD = 1.8V; VAA = 2.8V; VAA_PIX = 2.8V; VDD_PLL = 2.8V; Output load = 68.5pF;
TJ = 60°C; CLK_OP = 98 MPixel/s
VDD_IO
1.70V
1.80V
1.95V
2.50V
2.80V
3.10V
0
0.069
0.078
0.093
0.15
0.181
0.212
1
0.115
0.131
0.156
0.252
0.305
0.361
Parallel Slew Rate (R0x306E[15:13])
2
3
4
5
0.172
0.195
0.233
0.377
0.458
0.543
0.239
0.276
0.331
0.539
0.659
0.78
0.325
0.375
0.456
0.759
0.936
1.114
0.43
0.507
0.62
1.07
1.347
1.618
6
0.558
0.667
0.839
1.531
1.917
2.349
7
0.836
1.018
1.283
2.666
3.497
4.14
Units
V/ns
AR0330_DS Rev. U Pub. 4/15 EN
22
©Semiconductor Components Industries, LLC,2015.