AR0330 Datasheet, PDF (52/77 Pages) ON Semiconductor – CMOS Digital Image Sensor

AR0330: 1/3-Inch CMOS Digital Image Sensor
Sensor Frame Rate
Row Period (T_ROW)
The line_length_pck will determine the number of clock periods per row and the row
period (T_ROW) when combined with the sensor readout clock. The line_length_pck
includes both the active pixels and the horizontal blanking time per row. The sensor
utilizes two readout paths, as seen in Figure 18 on page 33, allowing the sensor to output
two pixels during each pixel clock.
The minimum line_length_pck is defined as the maximum of the following three equa-
tions:
ADC Readout Limitation:
1204ADC_HIGH_SPEED = 0
or
1116ADC_HIGH_SPEED = 10
(EQ 20)
Options to modify this limit, as mentioned in the “Sequencer” section, can be found in
the AR0330 Developer Guide.
Digital Readout Limitation:
1-- _
3
x---_---a_{---xd---_d---or---_d---ed--n-_--d-i-n---}–_{c----x+---_---a1---d---d---r--_-0--s-.-5-t-a---r---t}
(EQ 21)
Output Interface Limitations:
1-- _
2
x---_---a_{---xd---_d---or---_d---ed--n-_--d-i-n---}–_{c----x+---_---a1---d---d---r--_-0--s-.-5-t-a---r---t}
+ 96
(EQ 22)
Row Periods Per Frame
The frame_length_lines determines the number of row periods (T_ROW) per frame. This
includes both the active and blanking rows. The minimum_vertical_blanking value is
defined by the number of OB rows read per frame, two embedded data rows, and two
blank rows.
Minimum frame_length_lines = ^{y---_---a---d-}_--dy---_r---_o---ed--n-d--d-_---i-^–-n---cy---_-+--a---d1---d-_--r-_-_--2-s---t-a---r---t + minimum_vertical_blanking (EQ 23)
The sensor is configured to output frame information in two embedded data rows by
setting R0x3064[8] to 1 (default). If R0x3064[8] is set to 0, the sensor will instead output
two blank rows. The data configured in the two embedded rows is defined in MIPI CSI-2
Specification V1.00.
Table 37: Minimum Vertical Blanking Configuration
R0x3180[0x00F0]
0x8 (Default)
0x4
0x2
OB Rows
8 OB Rows
4 OB Rows
2 OB Rows
minimum_vertical_blanking
8 OB + 4 = 12
4 OB + 4 = 8
2 OB + 4 = 6
The locations of the OB rows, embedded rows, and blank rows within the frame readout
are identified in Figure 36: “Slave Mode Active State and Vertical Blanking,” on page 53.
AR0330_DS Rev. U Pub. 4/15 EN
52
©Semiconductor Components Industries, LLC,2015.