AR0330 Datasheet, PDF (57/77 Pages) ON Semiconductor – CMOS Digital Image Sensor

AR0330: 1/3-Inch CMOS Digital Image Sensor
Changing Sensor Modes
Figure 40 illustrates how the sensor active readout time can be minimized while
reducing the frame rate. 1308 VB rows were added to the output frame to reduce the
2304 x1296 frame rate from 60 fps to 30 fps without increasing the delay between the
readout of the first and last active row.
Figure 40:
Example of the Sensor Output of a 2304 x1296 Frame at 30 fps
The frame valid and line valid signals mentioned in this diagram represent internal signals within the sensor.
The SYNC codes represented in this diagram represent the HiSPi Streaming SP protocol.
1/30s
Row Reset
1/30s
Row Read Row Reset
Row Read ^{Vertical Blanking}
Active Rows
Time
Row Reset
Serial SYNC Codes
Start of Vertical Blanking
Start of Frame
Start of Active Row
End of Line
End of Frame
Frame Valid
Line Valid
VB
(1320 Rows)
Row Read
Row Reset
End of Frame
Readout
Row Read
End of Frame
Readout
2304 x 1296
HB (192 Pixels )
VB
(1320 Rows)
2304 x 1296
HB (192 Pixels )
Changing Sensor Modes
Register Changes
All register writes are delayed by 1x frame. A register that is written to during the readout
of frame n will not be updated to the new value until the readout of frame n+2. This
includes writes to the sensor gain and integration registers.
Real-Time Context Switching
In the AR0330, the user may switch between two full register sets A and B by writing to a
context switch change bit in R0x30B0[13]. When the context switch is configured to
context A the sensor will reference the “Context A Registers”. If the context switch is
changed from A to B during the readout of frame n, the sensor will then reference the
context B coarse_integration_time registers in frame n+1 and all other context B registers
at the beginning of reading frame n+2. The sensor will show the same behavior when
changing from context B to context A.
AR0330_DS Rev. U Pub. 4/15 EN
57
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