NP8P128A13BSM60E Datasheet, PDF (87/92 Pages) Numonyx B.V – 128-Mbit Parallel Phase Change Memory

Numonyx® Omneo™ P8P Datasheet
Table 40: Device Geometry Definition
Offset
27h
28h
2Ah
Length
Description
1 “n” such that device size = 2ⁿ in number of bytes
Flash device interface code assignment:
"n" such that n+1 specifies the bit field that represents the flash device width
capabilities as described in the table:
7
6
5
4
3
2
1
0
2
—
—
—
— x64 x32 x16
x8
15
14
13
12
11
10
9
8
—
—
—
—
—
—
—
—
2 “n” such that maximum number of bytes in write buffer = 2ⁿ
2Ch
1 Number of erase block regions (x) within device:
1. x = 0 means no erase blocking; the device erases in bulk
2. x specifies the number of device regions with one or
more contiguous same-size erase blocks.
3. Symmetrically blocked partitions have one blocking region
2Dh
4 Erase Block Region 1 Information
bits 0–15 = y, y+1 = number of identical-size erase blocks
bits 16–31 = z, region erase block(s) size are z x 256 bytes
31h
4 Erase Block Region 2 Information
bits 0–15 = y, y+1 = number of identical-size erase blocks
bits 16–31 = z, region erase block(s) size are z x 256 bytes
35h
4 Reserved for future erase block region information
Add.
27:
Hex
Code Value
See table below
28: --01 x16
29: --00
2A: --06 64
2B: --00
2C: See table below
2D:
2E: _{See table below}
2F:
30:
31:
32: _{See table below}
33:
34:
35:
36: _{See table below}
37:
38:
Device Geometry Definition
Address
128 Mbit
–B
–T
27:
--18
--18
28:
01:
01:
29:
00:
00:
2A:
06:
06:
2B:
00:
00:
2C:
--02
--02
2D:
--03
--7E
2E:
--00
--00
2F:
--80
--00
30:
--00
--02
31:
--7E
--03
32:
--00
--00
33:
--00
--80
34:
--02
--00
35:
--00
--00
36:
--00
--00
37:
--00
--00
38:
--00
--00
July 2010
316144-07
87