NP8P128A13BSM60E Datasheet, PDF (29/92 Pages) Numonyx B.V – 128-Mbit Parallel Phase Change Memory

Numonyx® Omneo™ P8P Datasheet
9.3
During a suspend, CE# = V_IH places the device in standby state, which reduces supply
current. V_PP must remain at its program level and WP# must remain unchanged while
in suspend mode.
The Resume (D0h) command instructs the WSM to continue writing/erasing and
automatically clears Status Register bits SR.2 (or SR.6) and SR.7. If Status Register
error bits are set, the Status Register can be cleared before issuing the next
instruction. RST# must remain at V_IH. See Section 31, “Write Suspend/Resume
Flowchart” on page 74 and Section 34, “Erase Suspend/Resume Flowchart” on
page 77.
If software compatibility with the Numonyx™ P33 device is desired, a minimum t_ERS/SUSP
time (See Section 17.0, “Program and Erase Characteristics” on page 71) should elapse
between an Erase command and a subsequent Erase Suspend command to ensure that
the device achieves sufficient cumulative erase time. Occasional Erase-to-Suspend
interrupts do not cause problems, but out-of-spec Erase-to-Suspend commands issued
too frequently to a P33 device may produce uncertain results. However, this
specification is not required for this PCM device.
Erase Resume
The Erase Resume command instructs the device to continue erasing, and
automatically clears status register bits SR[7,6]. This command can be written to any
address. If status register error bits are set, the Status Register should be cleared
before issuing the next instruction. RST# must remain deasserted (see Figure 31,
“Write Suspend/Resume Flowchart” on page 74).
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