NP8P128A13BSM60E Datasheet, PDF (14/92 Pages) Numonyx B.V – 128-Mbit Parallel Phase Change Memory

Numonyx® Omneo™ P8P Datasheet
3.0
Pinouts and Ballouts
Figure 3: 56-Lead TSOP Pinout (128-Mbit)
A16
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A23
9
A22
10
A21
11
VSS
12
VCC
13
WE#
14
WP#
15
A20
16
A19
17
A18
18
A8
19
A7
20
A6
21
A5
22
A4
23
A3
24
A2
25
NC
26
SERIAL
27
VSS
28
56-Lead TSOP Pinout
14 mm x 20 mm
Top View
56
Q
55
A17
54
DQ15
53
DQ7
52
DQ14
51
DQ6
50
DQ13
49
DQ5
48
DQ12
47
DQ4
46
D
45
C
44
RST#
43
VPP
42
DQ11
41
DQ3
40
DQ10
39
DQ2
38
VCCQ
37
DQ9
36
DQ1
35
DQ8
34
DQ0
33
VCC
32
OE#/HOLD#
31
VSS
30
CE#/S#
29
A1
Notes:
1.
A1 is the least significant address bit to be compatible with x8 addressing systems. Even though Numonyx® Omneo™ P8P
PCM is a 16 bit data bus.
2.
A23 is valid for 128-Mbit densities and above.
Datasheet
14
July 2010
316144-07