GXM Datasheet, PDF (91/244 Pages) National Semiconductor (TI) – Geode™ GXm Processor Integrated x86 Solution with MMX Support

4.0 Integrated Functions
The Geode GXm processor integrates a memory control-
ler, graphics pipeline and display controller in a Unified
Memory Architecture (UMA). UMA simplifies system
designs and significantly reduces overall system costs
associated with high chip count, small footprint notebook
designs. Performance degradation in traditional UMA sys-
tems is reduced through the use of National Semiconduc-
tor’s Display Compression Technology (DCT).
Figure 4-1 shows the major functional blocks of the GXm
processor and how the internal bus interface unit operates
as the interface between the processor’s core units and
the integrated functions.
This section details how the integrated functions and inter-
nal bus interface unit operate and their respective regis-
ters.
Write-Back
Cache Unit
C-Bus
MMU
Integer
Unit
Internal Bus Interface Unit
X-Bus
FPU
Integrated
Functions
Graphics
Pipeline
Memory
Controller
Display
Controller
PCI
Controller
SDRAM Port
CS5530
(CRT/LCD TFT)
Figure 4-1. Internal Block Diagram
PCI Bus
Revision 3.1
91
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