GXM Datasheet, PDF (126/244 Pages) National Semiconductor (TI) – Geode™ GXm Processor Integrated x86 Solution with MMX Support

Integrated Functions (Continued)
Table 4-25. Graphics Pipeline Configuration Registers (Continued)
Bit
Name Description
Note: The Graphics Pipeline Source Color Register specifies the colors used when expanding monochrome source data in either the
8-BPP mode or the 16-BPP mode. Those pixels corresponding to clear bits (0) in the source data are rendered using
GP_SRC_COLOR_0 and those pixels corresponding to set bits (1) in the source data are rendered using
GP_SRC_COLOR_1.
GX_BASE+8110h-8113h
GP_PAT_COLOR_A Register (R/W)
Default Value = 00000000h
8-BPP Mode
31:24
23:16
15:8
7:0
GP_PAT_COLOR_0:
8-BPP Color Index — The color index must be duplicated in the upper byte of GP_PAT_COLOR_0 when rendering 8-BPP
data.
GP_PAT_COLOR_1:
8-BPP Color Index — The color index must be duplicated in the upper byte of GP_PAT_COLOR_1 when rendering 8-BPP
data.
16-BPP Mode
31:16 GP_PAT_COLOR_0: 16-BPP Color (RGB)
15:0 GP_PAT_COLOR_1: 16-BPP Color (RGB)
Note: The Graphics Pipeline Pattern Color A and B Registers specify the colors used when expanding pattern data.
GX_BASE+8114h-8117h
GP_PAT_COLOR_B Register (R/W)
Default Value = 00000000h
8-BPP Mode
31:24
23:16
15:8
7:0
GP_PAT_COLOR_2:
8-BPP Color Index — The color index must be duplicated in the upper byte of GP_PAT_COLOR_2 when rendering 8-BPP
data.
GP_PAT_COLOR_3:
8-BPP Color Index — The color index must be duplicated in the upper byte of GP_PAT_COLOR_3 when rendering 8-BPP
data.
16-BPP Mode
31:16 GP_PAT_COLOR_2: 16-BPP Color (RGB)
15:0 GP_PAT_COLOR_3: 16-BPP Color (RGB)
Note: The Graphics Pipeline Pattern Color A and B Registers specify the colors used when expanding pattern data.
GX_BASE+8120h-8123h
GP_PAT_DATA_0 Register (R/W)
Default Value = 00000000h
31:0 GP Pattern Data Register 0: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of pat-
tern data. The GP_PAT_DATA_0 register corresponds to bits [31:0] of the pattern data.
GX_BASE+8124h-8127h
GP_PAT_DATA_1 Register (R/W)
Default Value = 00000000h
31:0 GP Pattern Data Register 1: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of pat-
tern data. The GP_PAT_DATA_1 register corresponds to bits [63:32] of the pattern data.
GX_BASE+8128h-812Bh
GP_PAT_DATA_2 Register (R/W)
Default Value = 00000000h
31:0 GP Pattern Data Register 2: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of pat-
tern data. The GP_PAT_DATA_2 register corresponds to bits [95:64] of the pattern data.
GX_BASE+812Ch-812Fh
GP_PAT_DATA_3 Register (R/W)
Default Value = 00000000h
31:0 GP Pattern Data Register 3: The Graphics Pipeline Pattern Data Registers 0 through 3 together contain 128 bits of pat-
tern data. The GP_PAT_DATA_3 register corresponds to bits [127:96] of the pattern data.
GX_BASE+8140h-8143h
GP_VGA_WRITE Register (R/W)
Default Value = xxxxxxxxh
Note that the registers at GX_BASE+82140h and 8144h are located in the area designated for the graphics pipeline but are used for
VGA emulation purposes. Refer to Table 5-5 on page 173 for these register’s bit formats.
GX_BASE+8144h-8147h
GP_VGA_READ Register (R/W)
Default Value = 00000000h
Note that the registers at GX_BASE+82140h and 8144h are located in the area designated for the graphics pipeline but are used for
VGA emulation purposes. Refer to Table 5-5 on page 173 for these register’s bit formats.
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