GXM Datasheet, PDF (137/244 Pages) National Semiconductor (TI) – Geode™ GXm Processor Integrated x86 Solution with MMX Support

Integrated Functions (Continued)
Table 4-29. Display Controller Register Summary (Continued)
GX_BASE+
Memory Offset Type Name/Function
Default
Value
8314h-8317h
8318h-831Bh
831Ch-831Fh
8320h-8323h
8324h-8327h
8328h-832Bh
832Ch-832Fh
R/W
R/W
--
R/W
R/W
R/W
--
DC_CB_ST_OFFSET
xxxxxxxxh
Display Controller Compression Buffer Start Address — Specifies offset at which the com-
pressed display buffer starts.
DC_CURS_ST_OFFSET
xxxxxxxxh
Display Controller Cursor Buffer Start Address — Specifies offset at which the cursor mem-
ory buffer starts.
Reserved
00000000h
DC_VID_ST_OFFSET
xxxxxxxxh
Display Controller Video Start Address — Specifies offset at which the video buffer starts.
DC_LINE_DELTA
xxxxxxxxh
Display Controller Line Delta — Stores line delta for the graphics display buffers.
DC_BUF_SIZE
xxxxxxxxh
Display Controller Buffer Size — Specifies the number of bytes to transfer for a line of
frame buffer data and the size of the compressed line buffer.
Reserved
00000000h
Timing Registers
8330h-8333h
8334h-8337h
8338h-833Bh
833Ch-833Fh
8340h-8343h
8344h-8247h
8348h-834Bh
834Ch-834Fh
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DC_H_TIMING_1
Display Controller Horizontal and Total Timing — Horizontal active and total timing
information.
DC_H_TIMING_2
Display Controller CRT Horizontal Blanking Timing — CRT horizontal blank timing
information.
DC_H_TIMING_3
Display Controller CRT Sync Timing — CRT horizontal sync timing information.
DC_FP_H_TIMING
Display Controller Flat Panel Horizontal Sync Timing: Horizontal sync timing information for
an attached flat panel display.
DC_V_TIMING_1
Display Controller Vertical and Total Timing — Vertical active and total timing information.
The parameters pertain to both CRT and flat panel display.
DC_V_TIMING_2
Display Controller CRT Vertical Blank Timing — Vertical blank timing information.
DC_V_TIMING_3
Display Controller CRT Vertical Sync Timing — CRT vertical sync timing information.
DC_FP_V_TIMING
Display Controller Flat Panel Vertical Sync Timing — Flat panel vertical sync timing
information.
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
Cursor and Line Compare Registers
8350h-8353h
8354h-8357h
8358h-835Bh
835Ch-835Fh
R/W
RO
R/W
R/W
DC_CURSOR_X
Display Controller Cursor X Position — X position information of the hardware cursor.
DC_V_LINE_CNT
Display Controller Vertical Line Count — This read only register provides the current scan-
line for the display. It is used by software to time update of the frame buffer to avoid tearing
artifacts.
DC_CURSOR_Y
Display Controller Cursor Y Position — Y position information of the hardware cursor.
DC_SS_LINE_CMP
Display Controller Split-Screen Line Compare — Contains the line count at which the lower
screen begins in a VGA split-screen mode.
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
xxxxxxxxh
Revision 3.1
137
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