GXM Datasheet, PDF (206/244 Pages) National Semiconductor (TI) – Geode™ GXm Processor Integrated x86 Solution with MMX Support

Instruction Set (Continued)
9.1.4 reg Field
The reg field (Table 9-10) determines which general regis-
ters are to be used. The selected register is dependent on
whether a 16- or 32-bit operation is current and on the sta-
tus of the w bit.
9.1.4.1 sreg2 Field (ES, CS, SS, DS Register
Selection)
The sreg2 field (Table 9-11) is a 2-bit field that allows one
of the four 286-type segment registers to be specified.
9.1.4.2 sreg3 Field (FS and GS Segment Register
Selection)
The sreg3 field (Table 9-12) is 3-bit field that is similar to
the sreg2 field, but allows use of the FS and GS segment
registers.
Table 9-10. General Registers Selected
by reg Field
16-Bit Operation
32-Bit Operation
reg
w=0
000
AL
001
CL
010
DL
011
BL
100
AH
101
CH
110
DH
111
BH
w=1
AX
CX
DX
BX
SP
BP
SI
DI
w=0
AL
CL
DL
BL
AH
CH
DH
BH
w=1
EAX
ECX
EDX
EBX
ESP
EBP
ESI
EDI
Table 9-11. sreg2 Field Encoding
sreg2 Field
Segment Register Selected
00
ES
01
CS
10
SS
11
DS
Table 9-12. sreg3 Field Encoding
sreg3 Field
Segment Register Selected
000
ES
001
CS
010
SS
011
DS
100
FS
101
GS
110
Undefined
111
Undefined
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