GXM Datasheet, PDF (19/244 Pages) National Semiconductor (TI) – Geode™ GXm Processor Integrated x86 Solution with MMX Support

Signal Definitions (Continued)
Index Corner
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
A
A
VCC3 AD25 VSS VCC2 AD16 VCC3 STOP# SERR# VSS AD11 AD8 VCC3 AD2 VCC2 VSS TST0 VCC3 VSS
B
B
VSS AD27 CBE3# AD21 AD19 CBE2# TRDY# LOCK# CBE1# AD13 AD9
AD6
AD3
SMI#
AD1 TST2 MD33 MD2
C
VCC3
AD31
AD26
AD23
VCC2
AD18 FRAME# VSS
PAR VCC3 AD10 VSS
AD4
C
AD0 VCC2 IRQ13 MD1 MD34 VCC3
D
D
AD30 AD29 AD24 AD22 AD20 AD17 IRDY# PERR# AD14 AD12
AD7
INTR TST1 TST3 MD0 MD32 MD3 MD35
E
REQ0# REQ2# AD28
VSS
VCC2 VCC2
VSS DEVSEL# AD15
VSS CBE0# AD5
VSS VCC2 VCC2 VSS
E
MD4 MD36 TDN
F
GNT0# TDI
F
MD5
TDP
G
VSS CLKMODE2 VSS
G
VSS MD37 VSS
H
GNT2# SUSPA#
H
MD6 MD38
J
TDO
VSS TEST
VCC2 VSS
J
MD7
K
REQ1# GNT1#
K
MD39 MD8
L
VCC2 VCC2 VCC2
L
VCC2 VCC2 VCC2
M
RESET SUSP#
M
MD40 MD9
N
VCC3 TMS
VSS
VSS
N
MD41 VCC3
P
FPVSYN TCK
P
MD10 MD42
Q
SERIALP VSS
NC
MD11
VSS
Q
MD43
R
CKMD1 FPHSYN
R
MD44 MD12
S
CKMD0 VID_VAL PIX0
T
PIX1 PIX2
Geode™ GXm
S
MD14 MD13 MD45
T
MD15 MD46
U
VSS VCC3 VSS
V
PIX3 VID_CLK
Processor
U
VSS VCC3 VSS
V
SYSCLK MD47
W
PIX6
PIX5
PIX4
X
NC
PIX9
320 SPGA - Top View
W
WEA# WEB# CASA#
X
DQM0 CASB#
Y
PIX8
VSS
PIX7
DQM1
VSS
Y
DQM4
Z
NC
PIX10
Z
CS2# DQM5
AA
VCC3 PIX11 VSS
AA
VSS CS0# VCC3
AB
PIX12 PIX13
AB
RASB# RASA#
AC
VCC2 VCC2 VCC2
AC
VCC2 VCC2 VCC2
AD
CRTHSYN DCLK
AD
MA2
MA0
AE
PIX14 VSS VCC2
VCC2 VSS
AE
MA1
AF
PIX15 PIX16
AF
MA4
MA3
AG
VSS PIX17 VSS
AG
VSS
MA5
VSS
AH
AH
CRTVSYN VDAT6
MA10 MA8
MA6
AJ
AJ
PCLK FLT# VDAT5 VSS VCC2 MD31 VSS MD60 MD57 VSS MD22 MD52 VSS VCC2 VCC2 VSS
BA1
MA9
MA7
AK
AK
VRDY VSS VDAT0 SDCLK0 SDCLK2 SDCLKIN MD29 MD27 MD56 MD55 MD21 MD20 MD50 MD16 DQM3 CS3# VSS
BA0
AL
VCC2 VDAT4 VDAT2 SDCLK1 VCC2 RWCLK SDCLKOUT VSS
MD58 VCC3 MD23
VSS
AL
MD19 MD49 VCC2 DQM6 CKEA MA11 VCC3
AM
AM
VDAT7 VDAT3 ENDIS SDCLK3 MD63 MD30 MD61 MD59 MD25 MD24 MD53 MD51 MD18 MD48 DQM7 DQM2 MA12 VOLDET
AN
AN
VSS VCC2 VDAT1 VSS VCC2 MD62 VCC3 MD28 MD26 VSS MD54 CKEB VCC3 MD17 VCC2 VSS CS1# VCC3 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37
Note: Signal names have been abbreviated in this figure due to space constraints.
= Denotes GND terminal
= Denotes PWR terminal (VCC2 = VCC_CORE; VCC3 = VCC_IO)
Figure 2-3. 320 SPGA Pin Assignment Diagram
For order information refer to Section A.1 “Order Information” on page 236.
Revision 3.1
19
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