GXM Datasheet, PDF (125/244 Pages) National Semiconductor (TI) – Geode™ GXm Processor Integrated x86 Solution with MMX Support

Integrated Functions (Continued)
Table 4-24. Graphics Pipeline Configuration Register Summary (Continued)
GX_BASE+
Memory Offset
Type Name / Function
Default Value
820Ch-820Fh
R/W GP_BLT_STATUS
00000000h
Graphics Pipeline BLT Status Register — Contains configuration and status infor-
mation for the BLT engine. The status bits are contained in the lower byte of the
register.
8210h-8213h
(Note)
R/W GP_VGA_BASE
Graphics Pipeline VGA Memory Base Address Register — Specifies the offset of
the VGA memory, starting from the base of graphics memory.
xxxxxxxxh
8214h-8217h
(Note)
R/W GP_VGA_LATCH
Graphics Pipeline VGA Display Latch Register — Provides a memory mapped
way to read or write the VGA display latch.
xxxxxxxxh
Note: The registers at GX_BASE+8140, 8144h, 8210h, and 8217h are located in the area designated for the graphics pipeline but
are used for VGA emulation purposes. Refer to Table 5-5 on page 173 for these register’s bit formats.
Table 4-25. Graphics Pipeline Configuration Registers
Bit
Name Description
GX_BASE+8100h-8103h
GP_DST/START_X/YCOOR Register (R/W)
Default Value = 00000000h
31:16
15:0
DESTINATION/STARTING Y POSITION (SIGNED):
BLT Mode — Specifies the destination Y position for a BLT operation.
Vector Mode — Specifies the starting Y position in a vector.
DESTINATION/STARTING X POSITION (SIGNED):
BLT Mode — Specifies the destination X position for a BLT operation.
Vector Mode — Specifies the starting X position in a vector.
GX_BASE+8104h-8107h
GP_WIDTH/HEIGHT and
GP_VECTOR_LENGTH/INIT_ERROR Register (R/W)
Default Value = 00000000h
31:16
15:0
PIXEL_WIDTH or VECTOR_LENGTH (UNSIGNED):
BLT Mode — Specifies the width, in pixels, of a BLT operation. No pixels are rendered for a width of zero.
Vector Mode — Bits [31:30] are reserved in this mode allowing this 14-bit field to specify the length, in pixels, of a vector. No
pixels are rendered for a length of zero. This field is limited to 14 bits due to a lack of precision in the registers used to hold
the error terms.
PIXEL_HEIGHT or VECTOR_INITIAL_ERROR (UNSIGNED):
BLT Mode — Specifies the height, in pixels, of a BLT operation. No pixels are rendered for a height of zero.
Vector Mode — Specifies the initial error for renderng a vector.
GX_BASE+8108h-810Bh GP_SCR_X/YCOOR and GP_AXIAL/DIAG_ERROR Register (R/W) Default Value = 00000000h
31:16
15:0
SRC_X_POS or VECTOR_AXIAL_ERROR (SIGNED):
BLT Mode — Specifies the source X position for a BLT operation.
Vector Mode — Specifies the axial error for rendering a vector.
SRC_Y_POS or VECTOR_DIAG_ERROR (SIGNED):
Source Y Position (Signed) — Specifies the source Y position for a BLT operation.
Vector Mode — Specifies the diagonal error for rendering a vector.
GX_BASE+810Ch-810Fh
GP_SRC_COLOR Register (R/W)
Default Value = 00000000h
8-BPP Mode
31:24
23:16
15:8
7:0
GP_SRC_COLOR_0:
8-BPP Color Index — The color index must be duplicated in the upper byte of GP_SRC_COLOR_0 when rendering 8-BPP
data.
GP_SRC_COLOR_1:
8-BPP Color Index — The color index must be duplicated in the upper byte of GP_SRC_COLOR_1 when rendering 8-BPP
data.
16-BPP Mode
31:16 GP_SRC_COLOR_0: 16-BPP Color (RGB)
15:0 GP_SRC_COLOR_1: 16-BPP Color (RGB)
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