GXM Datasheet, PDF (238/244 Pages) National Semiconductor (TI) – Geode™ GXm Processor Integrated x86 Solution with MMX Support

Index (Continued)
Directory Table Entry
Display Controller
73
129–154
Buffer Organization
135
CODEC hardware
129
Compression Logic
130
Compression Technology
130
CRT Display Modes
134
Cursor Pattern Memory
136
DC Memory Organization
135
DC_CURSOR_COLOR Register (BX_BASE+8360h) 131
Display FIFO
130
Display Modes
131
Display Timing
131
Dither/Frame-Rate Modulation (FRM)
131
Graphics Memory Map
135
Hardware Cursor
131
Memory Management
130
Pixel Arrangement Within a DWORD
135
RAMDAC
129
TFT LCD flat panel
129
TFT Panel Data Bus Formats
133
TFT Panel Display Modes
132
VESA-compatible
131
VGA Display Support
136
Display Controller Block Diagram
129
Display Controller Registers
136
Configuration and Status Registers
139
DC_BORDER_COLOR (8368h-836Bh)
138
DC_BUF_SIZE (8328h-832Bh)
137
DC_CB_ST_OFFSET (8314h-8317h)
137
DC_CFIFO_DIAG (837Ch-837Fh)
138
DC_CURS_ST_OFFSET (8318h-831Bh)
137
DC_CURSOR_COLOR (83680h-8363h)
138
DC_CURSOR_X (8350h-8353h)
137
DC_CURSOR_Y (8358h-835Bh)
137
DC_DFIFO_DIAG (8378h-837Bh)
138
DC_FB_ST_OFFSET (8310h-8313h)
136
DC_FP_H_TIMING (833Ch-833Fh)
137
DC_FP_V_TIMING (834Ch-834Fh)
137
DC_GENERAL_CFG (8304h-8307h)
136
DC_H_TIMING_1 (8330h-8333h)
137
DC_H_TIMING_2 (8334h-8337h)
137
DC_H_TIMING_3 (8338h-833Bh)
137
DC_LINE_DELTA (8324h-8327h)
137
DC_OUTPUT_CFG (830Ch-830Fh)
136
DC_PAL_ADDRESS (8370h-8373h)
138
DC_PAL_DATA (8374h-8377h)
138
DC_SS_LINE_CMP (835Ch-835Fh)
137
DC_TIMING_CFG (8308h-830Bh)
136
DC_UNLOCK (8300h-8303h)
136
DC_V_LINE_CNT (8354h-8357h)
137
DC_V_TIMING_1 (8340h-8343h)
137
DC_V_TIMING_2 (8344h-8247h)
137
DC_V_TIMING_3 (8348h-834Bh)
137
DC_VID_ST_OFFSET (8320h-8323h)
137
Memory Organization Registers
144
Display Driver
BB0_RESET
98
BB1_RESET
98
CPU_READ
98
CPU_WRITE
98
Scratchpad
98
Display Driver Instructions
98
DR6 Register
53
Bn
53
BS
53
BT
DR7 and DR6 Bit Definitions
DR7 Register
GD
Gn
LENn
Ln
R/Wn
DRAM Address Conversion
E
EBP register
EFLAGS Register
Alignment Check Enable (AM)
Auxiliary Carry Flag
Carry Flag
CPUID instruction
Direction Flag (DF)
I/O Privilege Level (IOPL)
Identification Bit
Interrupt Enable
Nested Task (NT)
Resume Flag (RF)
Sign Flag
Trap Enable Flag
Virtual 8086 Mode (VM)
EFLAGS register, bit 9
EGA
Electrical Connections
NC-Designated Pins
Power/Ground Connections
Pull-Up/Pull-Down Resisters
Unused Input Pins
Electrical Specifications
Absolute Maximum Ratings
AC Characteristics
Clock Signals
DC Characteristics Table
DCLK Timing
Graphics Port Timing
JTAG AC Specification
JTAG Test Timings
Output Valid Timing
Part Numbers
PCI Interface Signals
SDRAM Interface Signals
Setup and Hold Timings
SYSCLK Timing
System Signals
TCK Timing and Measurement Points
Video Interface Signals
Video Port Timing
Exceptions
Abort
Fault
Trap
Extended MMX Instruction Set
Extended MMX™ Instruction Set
Configuration Control Rregister
Legend
F
Fields - index
Fields - mod and r/m
Fields - sreg3
Fields - ss
floating point error
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53
53
53
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53
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43
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43
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43
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43
43
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43
43
43
83
165
182
182
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182
182
183
186
187
185
192
191
193
194
190
182
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190
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192
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75
74
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Revision 3.1