M16C Datasheet, PDF (80/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Preliminary Specifications REV.B
Mitsubishi microcomputers
Specifications in this manual are tentative and subject to change.
M16C / 6N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Watchdog Timer
Watchdog Timer during Wait Mode
The watchdog timer is supplied by the internal clock φ. If the internal clock φ stops, the watchdog timer stops
also. When executing a wait instruction, the internal clock φ stops if no interrupt request is pending or any
interrupt request that is pending is marked (i.e. the interrupts IPL is set to a value not greater than the CPU's
IPL).
The internal clock φ and the watchdog timer will continue running when at the issuance of the wait instruction
any nonmasked interrupt request was pending and the I flag in the flag register was cleared.
The same applies to an internal clock φ stopped during wait mode: If during wait mode a disabled but not
masked interrupt is requested and the I flag is cleared internal clock φ restarts. Though the CPU remains in
wait, the watchdog timer recommences activity where it left off and will in time request an interrupt itself.
Watchdog timer control register
b7 b6 b5 b4 b3 b2 b1 b0
00
Symbol
WDC
Address
000F16
Bit symbol
Bit name
High-order bits of watchdog timer
Reserved bit
Reserved bit
WDC7
Prescaler select bit
When reset
000XXXXX2
Function
RW
This bit can neither be set nor reset.
Must always be set to “0”
0 : Divided by 16
1 : Divided by 128
Watchdog timer start register
b7
b0
Symbol
WDTS
Address
000E16
When reset
Indeterminate
Function
RW
The watchdog timer is initialized and starts counting after a write instruction to
this register. The watchdog timer value is always initialized to “7FFF16”
regardless of whatever value is written.
Figure 8-2. Watchdog timer control and start registers
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