M16C Datasheet, PDF (64/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Preliminary Specifications REV.B
Mitsubishi microcomputers
Specifications in this manual are tentative and subject to change.
M16C / 6N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupts
The operation of saving registers carried out in the interrupt sequence is dependent whether content of the
stack pointer, at the time of acceptance of an interrupt equest, is even or odd. If the counter of the stack
pointer (Notze) is even, the counter of the flag register (FLG) and the content of the program counter (PC)
are saved, 16 bits at a time. If odd, their contents are saved in two steps, 8 bits at a time. Figure 6-7 shows
the operation of the saving registers.
Note: Stack pointer indicated by U flag.
(1) Stack pointer (SP) contains even number
Address
Stack area
Sequence in which order
registers are saved
[SP] – 5 (Odd)
[SP] – 4 (Even)
Program counter (PCL)
[SP] – 3(Odd)
Program counter (PCM)
[SP] – 2 (Even)
Flag register (FLGL)
[SP] – 1(Odd)
Flag register Program
(FLGH) counter (PCH)
[SP] (Even)
(2) Saved simultaneously,
all 16 bits
(1) Saved simultaneously,
all 16 bits
Finished saving registers
in two operations.
(2) Stack pointer (SP) contains odd number
Address
Stack area
Sequence in which order
registers are saved
[SP] – 5 (Even)
[SP] – 4(Odd)
Program counter (PCL)
[SP] – 3 (Even)
Program counter (PCM)
[SP] – 2(Odd)
Flag register (FLGL)
[SP] – 1 (Even)
[SP] (Odd)
Flag register Program
(FLGH) counter (PCH)
(3)
(4) _{Saved simultaneously,}
all 8 bits
(1)
(2)
Finished saving registers
in four operations.
Note: [SP] denotes the initial value of the stack pointer (SP) when interrupt request is acknowledged.
After registers are saved, the SP content is [SP] minus 4.
Figure 6-7. Operation of saving registers
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