M16C Datasheet, PDF (240/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Preliminary Specifications REV.B
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M16C / 6N Group
Parallel I/O Mode
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Data Protection Function (Block Lock)
Each of the blocks in Figure 24-1 has a nonvolatile lock bit that specifies protection (block lock) against
erasing/writing. A block is locked (writing "0" for the lock bit) with the lock bit program command. Also, the
lock bit of any block can be read with the read lock bit status command.
Block lock enable/disable is determined by the status of the lock bit itself and the status of the RP- and
WP pins. This relationship is given in Table 24-5.
(1) When the RP pin is "L" level, the deep power down mode is engaged and all blocks are locked.
(2) When the RP pin is "H" level and the WP pin "L" level, the specified block can be locked/unlocked
using the lock bit (lock bit data). Blocks with "0" lock bit data are locked and cannot be erased or
written in. On the other hand, blocks with "1" lock bit data are unlocked and can be erased or written
in.
(3) When the RP pin and the WP pin are both "H" level, all blocks are unlocked regardless of lock bit
data status and can be erased or written in. In this case, lock bit data that were "0" before the block
was erased are set to "1" (unlocked) after erasing, therefore the block is actually unlocked with the
lock bit.
Table 24-5. Block lock conditions
RP
WP ^{(Note 1)}
Lock bit
(Internal)
Block lock
VIL
X
VIH
VIL
VIH
VIL
VIH
VIH
X
Locks all blocks (Deep power down mode)
0
Locks block using lock bit data
1
Unlocks block using lock bit data
X
Unlocks all blocks (Note 2)
Note 1: During read/write operations or when the write state machine (WSM) status is busy (SR7
= "0"), do not switch WP pin state.
Note 2: In this case, the lock bit is set to "1" after the block is erased.
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