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M16C Datasheet, PDF (25/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Preliminary Specifications REV.B
Mitsubishi microcomputers
Specifications in this manual are tentative and subject to change.
M16C / 6N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Bus SCeotntitnrogls
Table 3-2. Pin functions for each processor mode
Processor mode Single-chip
mode
Memory expansion mode/microprocessor modes
External bus type
Multiplexed bus and
separate bus
separate bus
Multiplexed bus
space select bit
01 , 10
00
Data bus width
BYTE pin level
8 bits
=H
16 bits
=L
8 bits
=H
16 bits
=L
P00 to P07
I/O port
Data bus
Data bus
Data bus
Data bus
Memory
expansion mode
Multiplexed
bus (Note 1)
11 (Note 2)
8 bita
=H
I/O port
P10 to P17
P20
P21 to P27
P30
P31 to P37
I/O port
I/O port
I/O port
I/O port
I/O port
I/O port
Data bus
I/O port
Data bus
I/O port
Address bus
Address bus Address bus
/data bus(Note 3)
Address bus
Address bus
Address bus
/data bus(Note 3) /data bus(Note 3)
Address bus
Address bus Address bus
/data bus(Note 3)
Address bus Address bus Address bus
Address bus
Address bus
Address bus
Address bus
Address bus
/data bus
Address bus
/data bus
I/O port
I/O port
P40 to P43
Port P40 to P43
function select bit = 1
P40 to P43
Port P40 to P43
function select bit = 0
P44 to P47
I/O port
I/O port
I/O port
P50 to P53
I/O port
P54
I/O port
I/O port
I/O port
/O port
I/O port
I/O port
Address bus Address bus Address bus Address bus I/O port
CS (chip select) or programmable I/O port
(For details, refer to Bus control )
Outputs RD, WRL, WRH, and BCLK or RD, BHE, WR, and BCLK
(For details, refer to Bus control )
HLDA
HLDA
HLDA
HLDA
HLDA
P55
I/O port
HOLD
HOLD
HOLD
HOLD
HOLD
P56
I/O port
ALE
ALE
ALE
ALE
ALE
P57
I/O port
RDY
RDY
RDY
RDY
RDY
Note 1: In memory expansion mode, do not select a 16-bit multiplex bus.
Note 2: In microprocessor mode, multiplexed bus for the entire space cannot be selected.
In memory expansion mode, when multiplexed bus for the entire space is selected, address bus range is 256 bytes
in each chip select.
Note 3: Address bus when in separate bus mode.
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