English
Language : 

M16C Datasheet, PDF (58/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Preliminary Specifications REV.B
Mitsubishi microcomputers
Specifications in this manual are tentative and subject to change.
M16C / 6N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupts
Interrupt control register (Note 2)
Symbol
b7 b6 b5 b4 b3 b2 b1 b0
C01WKUPIC,
C0RECIC, C0TRMIC
TBiIC(i=3 to 5)
BCNIC
DMiIC(i=0, 1)
C01ERRIC, KUPIC
ADIC
SiTIC(i=0 to 2)
SiRIC(i=0 to 2)
TAiIC(i=0 to 4)
TBiIC(i=0 to 2)
Bit symbol
Bit name
ILVL0
Interrupt priority level
select bit
ILVL1
ILVL2
Address
004116
004216, 004316
004516 to 004716
004A16
004B16, 004C16
004D16, 004E16
004E16
005116, 005316, 004F16
0052 16, 005416, 005016
005516 to 005916
005A16 to 005C16
Function
When reset
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
XXXXX0002
RW
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
IR
Interrupt request bit
0 : Interrupt not requested
1 : Interrupt requested
(Note1)
Nothing is assigned.
In an attempt to write to these bits, write 0 . The value, if read, turns
out to be 0 .
Note 1: This bit can only be accessed for reset (= 0), but cannot be accessed for set (= 1).
Note 2: To rewrite the interrupt control register, do so at a point that dose not generate the
interrupt request for that register. For details, see the precautions for interrupts.
b7 b6 b5 b4 b3 b2 b1 b0
0
Symbol
Address
INTiIC(i=3)
004416
C1RECIC/INT5IC
(Note 3) 004816
C1TRMIC/S3IC/INT4IC (Note 3) 004916
INTiIC(i=0 to 2)
005D16 to 005F16
When reset
XX00X0002
XX00X0002
XX00X0002
XX00X0002
Bit symbol
ILVL0
Bit name
Interrupt priority level
select bit
ILVL1
ILVL2
Function
RW
b2 b1 b0
0 0 0 : Level 0 (interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
IR
Interrupt request bit
POL
Polarity select bit
Reserved bit
0: Interrupt not requested
1: Interrupt requested
0 : Selects falling edge
1 : Selects rising edge
Always set to 0
(Note1)
Nothing is assigned.
In an attempt to write to these bits, write 0 . The value, if read, turns
out to be 0 .
Note 1: This bit can only be accessed for reset (= 0), but cannot be accessed for set (= 1).
Note 2: To rewrite the interrupt control register, do so at a point that dose not generate the
interrupt request for that register. For details, see the precautions for interrupts.
Note 3: Use IFSR0/ISFR1 (address 1DE/1DF) for interrupt request cause selection.
Figure 6-3. Interrupt control registers
58