M16C Datasheet, PDF (145/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Preliminary Specifications REV.B
Mitsubishi microcomputers
Specifications in this manual are tentative and subject to change.
M16C / 6N Group
UCAloRckT2asSypnecchiraolnMooudseseRreiagliIs/tOer(U2ART) ^mode
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Bit 4 of the UART2 special mode register 2(address 01F6₁₆) is used as the UART2 initialization bit. Setting
this bit to "1", and when the start condition is detected, the microcomputer operates as follows:
(1) The transmission shift register is initialized, and the content of the transmission register is transferred
to the transmission shift register. This starts transmission by dealing with the clock entered next as
the first bit. The UART2 output value, however, does not change until the first bit data is output after
the entrance ofr the clock, and remains unchanged from the value at the moment when the
microcomputer detected the start condition.
(2) The reception shift register is initialized, and the microcomputer starts reception by dealing with the
clock entered next as the first bit.
(3) The SCL wait output bit turns to "1". This turns the SCL pin to "L" at the falling edge of the ninth bit of
the clock.
Starting to transmit/receive signals to/from UART2 using this function does not change the value of the
transmission buffer empty flag. To use this function, choose the external clock for the tansfer clocl.
Bit 5 of the UART2 special mode register 2 (01F6₁₆) is used as the SCL pin wait output bit 2. Setting this
bit to "1" with the serial I/O specified allows the user to forcibly output an "L" from the SCL pin even if
UART2 is in operation. Setting this bit to "0" frees the "L" output from the SCL pin, and the UART2 clock
is input/output.
Bit 6 of the UART special mode register 2 (01F6₁₆) is used as the SDA output enable bit. Setting this bit to
"1" forces the SDA pin to turn to the high-impedance state. Refrain from changing the value of this bit at
the rising edge of the UART2 transfer clock. There can be instances in which arbitration loss detecting flag
is turned on.
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