M16C Datasheet, PDF (176/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Preliminary Specifications REV.B
Mitsubishi microcomputers
Specifications in this manual are tentative and subject to change.
M16C / 6N Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
CAN Module
Mask Register and Acceptance Filter
For the acceptance filter, three 29-Bit mask registers are provided. One global mask is assigned to the
mailboxes 0 to 13 and two local masks belong to mailbox 14 and 15 respectively. If the mailbox is configured
as a receive slot, the Standard ID and the Extended ID of the message object act as the local ID mask.
Global Mask
Local Mask A
Local Mask B
Mailbox #0
Mailbox #1
Mailbox #2
Mailbox #3
Mailbox #4
Mailbox #5
Mailbox #6
Mailbox #7
Mailbox #8
Mailbox #9
Mailbox #10
Mailbox #11
Mailbox #12
Mailbox #13
Mailbox #14
Mailbox #15
Figure 18-12. Mask assignment
The mask registers provide the possibility to filter a range of identifier. They can mask the identifier by
setting each bit to '0'. The acceptance filter can be performed either for 29 or for 11 bit identifier length,
determined by the Extended ID register setting for the corresponding mailbox. The mailbox itself contains
the identifier for the filtering process. Together with the relevant mask, the filtering is performed as shown in
the figure below.
Received
Identifier
Identifier
stored in the
Mailbox
Mask
Register
Mask Bit Values
0:The corresponding incoming ID bit
is do not care .
1: The corresponding ID bit is
checked against the incoming ID
bit.
Acceptance
Signal
Acceptance Signal Values
0:The CAN module ignores the
current incoming message.
1:The CAN module stores the
incoming message; the relevant bits
(determined by the mask) of received
ID and mailbox ID are equal.
Figure 18-13. Structure of acceptance filter
Figure 18-13 and 18-14 show the memory location of these three filter masks and their bitmap. The structure of
the bit organization is adapted to the identifier format in every message slot (refer to Figure 18-2/18-3).
After MCU reset condition, the content of the mask registers is undefined.
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