M16C Datasheet, PDF (20/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Preliminary Specifications REV.B
Mitsubishi microcomputers
Specifications in this manual are tentative and subject to change.
M16C / 6N Group
BCuPsUControl
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Bit 7: Stack pointer select flag (U flag)
The interrupt stack pointer (ISP) is selected when this flag is “0” ; user stack pointer (USP) is selected
when this flag is “1”.
This flag is cleared to “0” when a hardware interrupt is acknowledged or an INT instruction of software
interrupt Nos. 0 to 31 is executed.
• Bits 8 to 11: Reserved area
• Bits 12 to 14: Processor interrupt priority level (IPL)
Processor interrupt priority level (IPL) is configured with three bits, for specification of up to eight
processor interrupt priority levels from level 0 to level 7.
If a requested interrupt has a priority greater than the processor interrupt priority level (IPL), the interrupt
is enabled.
• Bit 15: Reserved area
The C, Z, S, and O flags are changed when instructions are executed. See the software manual for details.
b15
IPL
b0
U I O B S Z D C Flag register (FLG)
Figure 3-2. Flag register (FLG)
Carry flag
Debug flag
Zero flag
Sign flag
Register bank select flag
Overflow flag
Interrupt enable flag
Stack pointer select flag
Reserved area
Processor interrupt priority level
Reserved area
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