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M1A3P250-VQ100 Datasheet, PDF (61/210 Pages) Microsemi Corporation – ProASIC3 Flash Family FPGAs with Optional Soft ARM Support | |||
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ProASIC3 Flash Family FPGAs
Table 2-72 ⢠1.8 V LVCMOS High Slew
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.7 V
Applicable to Standard Plus I/O Banks
Drive
Strength
2 mA
Speed
Grade
Std.
tDOUT
0.66
tDP tDIN tPY tEOUT
11.33 0.04 1.20 0.43
tZL
8.72
tZH tLZ tHZ tZLS tZHS
11.33 2.24 1.52 10.96 13.57
Units
ns
â1 0.56 9.64 0.04 1.02 0.36 7.42 9.64 1.91 1.29 9.32 11.54 ns
â2 0.49 8.46 0.03 0.90 0.32 6.51 8.46 1.68 1.14 8.18 10.13 ns
4 mA
Std. 0.66 6.48 0.04 1.20 0.43 5.48 6.48 2.65 2.60 7.72 8.72 ns
â1 0.56 5.51 0.04 1.02 0.36 4.66 5.51 2.25 2.21 6.56 7.42 ns
â2 0.49 4.84 0.03 0.90 0.32 4.09 4.84 1.98 1.94 5.76 6.51 ns
6 mA
Std. 0.66 4.06 0.04 1.20 0.43 3.84 4.06 2.93 3.10 6.07 6.30 ns
â1 0.56 3.45 0.04 1.02 0.36 3.27 3.45 2.49 2.64 5.17 5.36 ns
â2 0.49 3.03 0.03 0.90 0.32 2.87 3.03 2.19 2.32 4.54 4.70 ns
8 mA
Std. 0.66 4.06 0.04 1.20 0.43 3.84 4.06 2.93 3.10 6.07 6.30 ns
â1 0.56 3.45 0.04 1.02 0.36 3.27 3.45 2.49 2.64 5.17 5.36 ns
â2 0.49 3.03 0.03 0.90 0.32 2.87 3.03 2.19 2.32 4.54 4.70 ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Revision 15
2- 56
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