M1A3P250-VQ100 Datasheet, PDF (32/210 Pages) Microsemi Corporation – ProASIC3 Flash Family FPGAs with Optional Soft ARM Support

ProASIC3 Flash Family FPGAs
Table 2-30 • I/O Output Buffer Maximum Resistances¹
Applicable to Standard I/O Banks
Standard
Drive Strength
R_PULL-DOWN
(Ω)²
R_PULL-UP
(Ω)³
3.3 V LVTTL / 3.3 V LVCMOS
2 mA
100
300
4 mA
100
300
6 mA
50
150
3.3 V LVCMOS Wide Range⁴
8 mA
100 µA
50
Same as regular
3.3 V LVCMOS
150
Same as regular
3.3 V LVCMOS
2.5 V LVCMOS
2 mA
100
200
4 mA
100
200
6 mA
50
100
8 mA
50
100
1.8 V LVCMOS
2 mA
200
225
4 mA
100
112
1.5 V LVCMOS
2 mA
200
224
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance
values depend on VCCI, drive strength selection, temperature, and process. For board design
considerations and detailed output buffer resistances, use the corresponding IBIS models located at
http://www.microsemi.com/soc/download/ibis/default.aspx.
2. R_{(PULL-DOWN-MAX)} = (VOLspec) / IOLspec
3. R_{(PULL-UP-MAX)} = (VCCImax – VOHspec) / IOHspec
4. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD-8B
specification.
Table 2-31 • I/O Weak Pull-Up/Pull-Down Resistances
Minimum and Maximum Weak Pull-Up/Pull-Down Resistance Values
R_(WEAK
1
PULL-UP)
(Ω)
R_(WEAK
2
PULL-DOWN)
(Ω)
VCCI
Min.
Max.
Min.
Max.
3.3 V
10 k
45 k
10 k
45 k
3.3 V (wide range I/Os)
10 k
45 k
10 k
45 k
2.5 V
11 k
55 k
12 k
74 k
1.8 V
18 k
70 k
17 k
110 k
1.5 V
19 k
90 k
19 k
140 k
Notes:
1. R_{(WEAK PULL-UP-MAX)} = (VCCI_MAX – VOH_spec) / I_{(WEAK PULL-UP-MIN)}
2. R_{(WEAK PULL-DOWN-MAX)} = (VOL_spec) / I_{(WEAK PULL-DOWN-MIN)}
Revision 15
2- 27