PIC18F1XK22 Datasheet, PDF (68/388 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F1XK22/LF1XK22
REGISTER 7-2: INTCON2: INTERRUPT CONTROL 2 REGISTER
R/W-1
R/W-1
R/W-1
R/W-1
U-0
R/W-1
U-0
R/W-1
RABPU
INTEDG0 INTEDG1 INTEDG2
—
TMR0IP
—
RABIP
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
RABPU: PORTA and PORTB Pull-up Enable bit
1 = PORTA and PORTB pull-ups are disabled
0 = PORTA and PORTB pull-ups are enabled provided that the pin is an input and the corresponding
WPUA and WPUB bits are set.
bit 6
INTEDG0: External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
bit 5
INTEDG1: External Interrupt 1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
bit 4
INTEDG2: External Interrupt 2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
bit 3
Unimplemented: Read as ‘0’
bit 2
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
Unimplemented: Read as ‘0’
bit 0
RABIP: RA and RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit. User software should ensure
the appropriate interrupt flag bits are clear
prior to enabling an interrupt. This feature
allows for software polling.
DS41365D-page 68
Preliminary
 2010 Microchip Technology Inc.