PIC18F1XK22 Datasheet, PDF (256/388 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F1XK22/LF1XK22
21.6 Reset State of Registers
Some registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. All other registers are forced to a “Reset state”
depending on the type of Reset that occurred.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal
operation. Status bits from the RCON register, RI, TO,
PD, POR and BOR, are set or cleared differently in
different Reset situations, as indicated in Table 21-3.
These bits are used by software to determine the
nature of the Reset.
Table 21-4 describes the Reset states for all of the
Special Function Registers. These are categorized by
Power-on and Brown-out Resets, Master Clear and
WDT Resets and WDT wake-ups.
TABLE 21-3: STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION
FOR RCON REGISTER
Condition
Program
Counter
SBOREN
RCON Register
STKPTR Register
RI TO PD POR BOR STKOVF STKUNF
Power-on Reset
0000h
1
11100
0
0
RESET Instruction
0000h
u⁽²⁾
0uuuu
u
u
Brown-out Reset
0000h
u⁽²⁾
111u0
u
u
MCLR during Power-Managed
0000h
u⁽²⁾
u1uuu
u
u
Run Modes
MCLR during Power-Managed
0000h
u⁽²⁾
u10uu
u
u
Idle Modes and Sleep Mode
WDT Time-out during Full Power 0000h
u⁽²⁾
u0uuu
u
u
or Power-Managed Run Mode
MCLR during Full Power
Execution
0000h
u⁽²⁾
uuuuu
u
u
Stack Full Reset (STVREN = 1)
0000h
u⁽²⁾
uuuuu
1
u
Stack Underflow Reset
0000h
u⁽²⁾
uuuuu
u
1
(STVREN = 1)
Stack Underflow Error (not an
0000h
u⁽²⁾
uuuuu
u
1
actual Reset, STVREN = 0)
WDT Time-out during
PC + 2
u⁽²⁾
u00uu
u
u
Power-Managed Idle or Sleep
Modes
Interrupt Exit from
Power-Managed Modes
PC + 2⁽¹⁾
u⁽²⁾
uu0uu
u
u
Legend: u = unchanged
Note 1: When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (008h or 0018h).
2: Reset state is ‘1’ for POR and unchanged for all other Resets when software BOR is enabled
(BOREN<1:0> Configuration bits = 01 and SBOREN = 1). Otherwise, the Reset state is ‘0’.
DS41365D-page 256
Preliminary
 2010 Microchip Technology Inc.