PIC18F1XK22 Datasheet, PDF (356/388 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F1XK22/LF1XK22
FIGURE 25-13: CAPTURE/COMPARE/PWM TIMINGS (CCP)
CCPx
(Capture mode)
Note: Refer to Figure 25-7 for load conditions.
CC01
CC02
CC03
TABLE 25-7: CAPTURE/COMPARE/PWM REQUIREMENTS (CCP)
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C  TA  +125°C
Param
No.
Sym.
Characteristic
Min.
Typ† Max. Units
Conditions
CC01* TccL CCPx Input Low Time
No Prescaler 0.5TCY + 20 — — ns
With Prescaler
20
— — ns
CC02* TccH CCPx Input High Time
No Prescaler 0.5TCY + 20 —
—
ns
With Prescaler
20
— — ns
CC03* TccP CCPx Input Period
3TCY + 40 — — ns N = prescale value (1, 4 or 16)
N
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
TABLE 25-8: PIC18F1XK22/LF1XK22 A/D CONVERTER (ADC) CHARACTERISTICS:
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C  TA  +125°C
Param
No.
Sym.
Characteristic
Min. Typ† Max. Units
Conditions
AD01 NR Resolution
—
—
10 bit
AD02 EIL Integral Error
—
— ±1.5 LSb VREF = 3.0V
AD03 EDL Differential Error
—
— ±1.2 LSb No missing codes
VREF = 3.0V
AD04 EOFF Offset Error
—
—
±4 LSb VREF = 3.0V
AD05 EGN Gain Error
—
—
±3 LSb VREF = 3.0V
AD06 VREF Change in Reference Voltage =
VREF+ - VREF-⁽³⁾
1.8
—
VDD V 1.8 VREF+ VDD + 0.3V
VSS - 0.3V VREF- VREF+ - 1.8V
AD07 VAIN Full-Scale Range
VSS
—
VREF V
AD08 ZAIN
AD09* IREF
Recommended Impedance of
Analog Voltage Source
VREF Input Current⁽³⁾
—
—
2.5 k Can go higher if external 0.01F capacitor is
present on input pin.
10
— 1000 A During VAIN acquisition.
Based on differential of VHOLD to VAIN.
—
—
10 A During A/D conversion cycle.
*
†
Note 1:
2:
3:
These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Total Absolute Error includes integral, differential, offset and gain errors.
ADC VREF is from external VREF, VDD pin or FVR, whichever is selected as reference input.
When ADC is off, it will not consume any current other than leakage current. The power-down current specification
includes any such leakage from the ADC module.
DS41365D-page 356
Preliminary
 2010 Microchip Technology Inc.