PIC18F1XK22 Datasheet, PDF (258/388 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F1XK22/LF1XK22
TABLE 21-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Address
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
FSR1H
FE2h
---- 0000
---- 0000
---- uuuu
FSR1L
FE1h
xxxx xxxx
uuuu uuuu
uuuu uuuu
BSR
FE0h
---- 0000
---- 0000
---- uuuu
INDF2
FDFh
N/A
N/A
N/A
POSTINC2
FDEh
N/A
N/A
N/A
POSTDEC2
FDDh
N/A
N/A
N/A
PREINC2
FDCh
N/A
N/A
N/A
PLUSW2
FDBh
N/A
N/A
N/A
FSR2H
FDAh
---- 0000
---- 0000
---- uuuu
FSR2L
FD9h
xxxx xxxx
uuuu uuuu
uuuu uuuu
STATUS
FD8h
---x xxxx
---u uuuu
---u uuuu
TMR0H
FD7h
0000 0000
0000 0000
uuuu uuuu
TMR0L
FD6h
xxxx xxxx
uuuu uuuu
uuuu uuuu
T0CON
FD5h
1111 1111
1111 1111
uuuu uuuu
OSCCON
FD3h
0011 qq00
0011 qq00
uuuu uuuu
OSCCON2
FD2h
---- -10x
---- -10x
---- -uuu
WDTCON
RCON⁽⁴⁾
FD1h
FD0h
---- ---0
0q-1 11q0
---- ---0
0q-q qquu
---- ---u
uq-u qquu
TMR1H
FCFh
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR1L
FCEh
xxxx xxxx
uuuu uuuu
uuuu uuuu
T1CON
FCDh
0000 0000
u0uu uuuu
uuuu uuuu
TMR2
FCCh
0000 0000
0000 0000
uuuu uuuu
PR2
FCBh
1111 1111
1111 1111
1111 1111
T2CON
FCAh
-000 0000
-000 0000
-uuu uuuu
SSPBUF
FC9h
xxxx xxxx
uuuu uuuu
uuuu uuuu
SSPADD
FC8h
0000 0000
0000 0000
uuuu uuuu
SSPSTAT
FC7h
0000 0000
0000 0000
uuuu uuuu
SSPCON1
FC6h
0000 0000
0000 0000
uuuu uuuu
SSPCON2
FC5h
0000 0000
0000 0000
uuuu uuuu
Legend:
Note 1:
2:
3:
4:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hard-
ware stack.
See Table 21-3 for Reset value for specific condition.
DS41365D-page 258
Preliminary
 2010 Microchip Technology Inc.