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PIC18F1XK22 Datasheet, PDF (163/388 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology
PIC18F1XK22/LF1XK22
14.3.7 BAUD RATE
In I2C Master mode, the Baud Rate Generator (BRG)
reload value is placed in the SSPADD register
(Figure 14-17). When a write occurs to SSPBUF, the
Baud Rate Generator will automatically begin counting.
Once the given operation is complete (i.e.,
transmission of the last data bit is followed by ACK), the
internal clock will automatically stop counting and the
SCL pin will remain in its last state.
Table 14-3 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPADD.
EQUATION 14-1:
FSCL = ---S---S----P----A----FD---O-D---S--C-+------1--------4----
FIGURE 14-17:
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM<3:0>
SSPADD<7:0>
SSPM<3:0>
SCL
Reload
Control
Reload
CLKOUT
BRG Down Counter
FOSC/2
TABLE 14-3: I2C™ CLOCK RATE W/BRG
FOSC
FCY
BRG Value
FSCL
(2 Rollovers of BRG)
48 MHz
12 MHz
0Bh
1 MHz(1)
48 MHz
12 MHz
1Dh
400 kHz
48 MHz
12 MHz
77h
100 kHz
40 MHz
10 MHz
18h
400 kHz(1)
40 MHz
10 MHz
1Fh
312.5 kHz
40 MHz
16 MHz
10 MHz
4 MHz
63h
100 kHz
09h
400 kHz(1)
16 MHz
4 MHz
0Ch
308 kHz
16 MHz
4 MHz
4 MHz
1 MHz
27h
100 kHz
02h
333 kHz(1)
Note 1:
4 MHz
1 MHz
09h
100 kHz
4 MHz
1 MHz
00h
1 MHz(1)
The I2C interface does not conform to the 400 kHz I2C specification (which applies to rates greater than
100 kHz) in all details, but may be used with care where higher rates are required by the application.
 2010 Microchip Technology Inc.
Preliminary
DS41365D-page 163