PIC18F1XK22 Datasheet, PDF (239/388 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F1XK22/LF1XK22
19.0 SR LATCH
The module consists of a single SR latch with multiple
Set and Reset inputs as well as selectable latch output.
The SR latch module includes the following features:
• Programmable input selection
• SR latch output is available internally/externally
• Selectable Q and Q output
• Firmware Set and Reset
19.1 Latch Operation
The latch is a Set-Reset latch that does not depend on a
clock source. Each of the Set and Reset inputs are
active-high. The latch can be Set or Reset by CxOUT,
INT1 pin, or variable clock. Additionally the SRPS and
the SRPR bits of the SRCON0 register may be used to
Set or Reset the SR latch, respectively. The latch is
reset-dominant, therefore, if both Set and Reset inputs
are high the latch will go to the Reset state. Both the
SRPS and SRPR bits are self resetting which means
that a single write to either of the bits is all that is
necessary to complete a latch Set or Reset operation.
19.2 Latch Output
The SRQEN and SRNQEN bits of the SRCON0
register control the latch output selection. Both of the
SR latch’s outputs may be directly output to an
independent I/O pin. Control is determined by the state
of bits SRQEN and SRNQEN in registers SRCON0.
The applicable TRIS bit of the corresponding port must
be cleared to enable the port pin output driver.
19.3 Effects of a Reset
Upon any device Reset, the SR latch is not initialized.
The user’s firmware is responsible to initialize the latch
output before enabling it to the output pins.
FIGURE 19-1:
SR LATCH SIMPLIFIED BLOCK DIAGRAM
SRPS
Pulse
Gen⁽²⁾
INT1
SRSPE
SRCLK
SRSCKE
SYNCC2OUT⁽⁴⁾
SRSC2E
SYNCC1OUT⁽⁴⁾
SRSC1E
SRPR
Pulse
Gen⁽²⁾
INT1
SRRPE
SRCLK
SRRCKE
SYNCC2OUT⁽⁴⁾
SRRC2E
SYNCC1OUT⁽⁴⁾
SRRC1E
SQ
SR
Latch⁽¹⁾
RQ
Note 1:
2:
3:
4:
If R = 1 and S = 1 simultaneously, Q = 0, Q = 1
Pulse generator causes a 2 Q-state pulse width.
Output shown for reference only. See I/O port pin block diagram for more detail.
Name denotes the source of connection at the comparator output.
SRLEN
SRQEN
SRQ pin⁽³⁾
SRNQ pin⁽³⁾
SRLEN
SRNQEN
 2010 Microchip Technology Inc.
Preliminary
DS41365D-page 239