PIC18F1XK22 Datasheet, PDF (259/388 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F1XK22/LF1XK22
TABLE 21-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Address
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
ADRESH
ADRESL
ADCON0
ADCON1
FC4h
FC3h
FC2h
FC1h
xxxx xxxx
xxxx xxxx
--00 0000
---- 0000
uuuu uuuu
uuuu uuuu
--00 0000
---- 0000
uuuu uuuu
uuuu uuuu
--uu uuuu
---- uuuu
ADCON2
CCPR1H
FC0h
FBFh
0-00 0000
xxxx xxxx
0-00 0000
uuuu uuuu
u-uu uuuu
uuuu uuuu
CCPR1L
FBEh
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON
FBDh
0000 0000
0000 0000
uuuu uuuu
VREFCON2
VREFCON1
VREFCON0
PSTRCON
BAUDCON
PWM1CON
FBCh
FBBh
FBAh
FB9h
FB8h
FB7h
---0 0000
000- 00-0
0001 00--
---0 0001
0100 0-00
0000 0000
---0 0000
000- 00-0
0001 00--
---0 0001
0100 0-00
0000 0000
---u uuuu
uuu- uu-u
uuuu uu--
---u uuuu
uuuu u-uu
uuuu uuuu
ECCP1AS
FB6h
0000 0000
0000 0000
uuuu uuuu
TMR3H
TMR3L
FB3h
FB2h
xxxx xxxx
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
T3CON
SPBRGH
FB1h
FB0h
0000 0000
0000 0000
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
SPBRG
RCREG
TXREG
TXSTA
FAFh
FAEh
FADh
FACh
0000 0000
0000 0000
0000 0000
0000 0010
0000 0000
0000 0000
0000 0000
0000 0010
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
RCSTA
FABh
0000 000x
0000 000x
uuuu uuuu
EEADR
EEDATA
EECON2
EECON1
FAAh
FA8h
FA7h
FA6h
0000 0000
0000 0000
0000 0000
xx-0 x000
0000 0000
0000 0000
0000 0000
uu-0 u000
uuuu uuuu
uuuu uuuu
0000 0000
uu-0 u000
Legend:
Note 1:
2:
3:
4:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hard-
ware stack.
See Table 21-3 for Reset value for specific condition.
 2010 Microchip Technology Inc.
Preliminary
DS41365D-page 259