PIC18F1XK22 Datasheet, PDF (24/388 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F1XK22/LF1XK22
TABLE 2-2: EXAMPLES OF DELAYS DUE TO CLOCK SWITCHING
Switch From
Switch To
Oscillator Delay
Sleep/POR
Sleep/POR
Sleep/POR
LFINTOSC
HFINTOSC
LP, XT, HS
EC, RC
Oscillator Warm-up Delay (TWARM)
1024 clock cycles
8 Clock Cycles
2.10 4x Phase Lock Loop Frequency
Multiplier
A Phase Locked Loop (PLL) circuit is provided as an
option for users who wish to use a lower-frequency
external oscillator or to operate at 32 MHz or 64 MHz
with the HFINTOSC. The PLL is designed for an input
frequency from 4 MHz to 16 MHz. The PLL multiplies
its input frequency by a factor of four when the PLL is
enabled. This may be useful for customers who are
concerned with EMI, due to high-frequency crystals.
Two bits control the PLL: the PLL_EN bit of the
CONFIG1H Configuration register and the PLLEN bit of
the OSCTUNE register. The PLL is enabled when the
PLL_EN bit is set and it is under software control when
the PLL_EN bit is cleared. Refer to Table 2-3 and
Table 2-4 for more information.
TABLE 2-3:
PLL_EN
1
0
0
PLL CONFIGURATION
PLLEN
PLL Status
x
PLL enabled
1
PLL enabled
0
PLL disabled
TABLE 2-4:
PLL CONFIG1H/SOFTWARE
ENABLE CLOCK SOURCE
RESTRICTIONS
Mode
PLL CONFIG1H PLL Software
Enable (PLL_EN) Enable (PLLEN)
LP
XT
HS
EC
EXTRC
LF INTOSC
HF INTOSC
Yes
Yes
Yes
Yes
Yes
No
8/16 MHz
No
No
No
No
No
No
8/16 MHz
2.11 Two-Speed Start-up Mode
Two-Speed Start-up mode provides additional power
savings by minimizing the latency between external
Oscillator Start-up Timer (OST) and code execution. In
applications that make heavy use of the Sleep mode,
Two-Speed Start-up will remove the OST period, which
can reduce the overall power consumption of the
device.
Two-Speed Start-up mode is enabled by setting the
IESO bit of the CONFIG1H Configuration register. With
Two-Speed Start-up enabled, the device will execute
instructions using the internal oscillator during the
Primary External Oscillator OST period.
When the system clock is set to the Primary External
Oscillator and the oscillator is configured for LP, XT or
HS modes, the device will not execute code during the
OST period. The OST will suspend program execution
until 1024 oscillations are counted. Two-Speed Start-
up mode minimizes the delay in code execution by
operating from the internal oscillator while the OST is
active. The system clock will switch back to the Primary
External Oscillator after the OST period has expired.
Two-speed Start-up will become active after:
• Power-on Reset (POR)
• Power-up Timer (PWRT), if enabled
• Wake-up from Sleep
The OSTS bit of the OSCCON register reports which
oscillator the device is currently using for operation.
The device is running from the oscillator defined by the
FOSC bits of the CONFIG1H Configuration register
when the OSTS bit is set. The device is running from
the internal oscillator when the OSTS bit is clear.
DS41365D-page 24
Preliminary
 2010 Microchip Technology Inc.