PIC18F1XK22 Datasheet, PDF (20/388 Pages) Microchip Technology – 20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC18F1XK22/LF1XK22
2.7 Oscillator Control
The Oscillator Control (OSCCON) (Register 2-1) and the
Oscillator Control 2 (OSCCON2) (Register 2-2) registers
control the system clock and frequency selection
options.
REGISTER 2-1: OSCCON: OSCILLATOR CONTROL REGISTER
R/W-0
IDLEN
bit 7
R/W-0
IRCF2
R/W-1
IRCF1
R/W-1
IRCF0
R-q
OSTS⁽¹⁾
R-0
HFIOFS
R/W-0
SCS1
R/W-0
SCS0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
q = depends on condition
x = Bit is unknown
bit 7
bit 6-4
bit 3
bit 2
bit 1-0
IDLEN: Idle Enable bit
1 = Device enters Idle mode on SLEEP instruction
0 = Device enters Sleep mode on SLEEP instruction
IRCF<2:0>: Internal Oscillator Frequency Select bits
111 = 16 MHz
110 = 8 MHz
101 = 4 MHz
100 = 2 MHz
011 = 1 MHz⁽³⁾
010 = 500 kHz
001 = 250 kHz
000 = 31 kHz⁽²⁾
OSTS: Oscillator Start-up Time-out Status bit⁽¹⁾
1 = Device is running from the clock defined by FOSC<2:0> of the CONFIG1 register
0 = Device is running from the internal oscillator (HFINTOSC or LFINTOSC)
HFIOFS: HFINTOSC Frequency Stable bit
1 = HFINTOSC frequency is stable
0 = HFINTOSC frequency is not stable
SCS<1:0>: System Clock Select bits
1x = Internal oscillator block
01 = Secondary (Timer1) oscillator
00 = Primary clock (determined by CONFIG1H[FOSC<3:0>]).
Note 1: Reset state depends on state of the IESO Configuration bit.
2: Source selected by the INTSRC bit of the OSCTUNE register, see text.
3: Default output frequency of HFINTOSC on Reset.
DS41365D-page 20
Preliminary
 2010 Microchip Technology Inc.