PIC18F67J11T-I Datasheet, PDF (459/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
Resets .............................................................................. 331
Brown-out Reset (BOR) ........................................... 331
Oscillator Start-up Timer (OST) ............................... 331
Power-on Reset (POR) ............................................ 331
Power-up Timer (PWRT) ......................................... 331
RETFIE ............................................................................ 378
RETLW ............................................................................ 378
RETURN .......................................................................... 379
Revision History ............................................................... 447
RLCF ................................................................................ 379
RLNCF ............................................................................. 380
RRCF ............................................................................... 380
RRNCF ............................................................................ 381
S
SCKx ................................................................................ 237
SDIx ................................................................................. 237
SDOx ............................................................................... 237
SEC_IDLE Mode ................................................................ 52
SEC_RUN Mode ................................................................ 48
Serial Clock, SCKx ........................................................... 237
Serial Data In (SDIx) ........................................................ 237
Serial Data Out (SDOx) ................................................... 237
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 381
Slave Select (SSx) ........................................................... 237
SLEEP ............................................................................. 382
Software Simulator (MPLAB SIM) .................................... 399
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 331
SPI Mode (MSSP) ............................................................ 237
Associated Registers ............................................... 247
Bus Mode Compatibility ........................................... 246
Clock Speed, Interactions ........................................ 246
Effects of a Reset ..................................................... 246
Enabling ................................................................... 242
Master Mode ............................................................ 243
Master/Slave Connection ......................................... 242
Operation in Power-Managed Modes ...................... 246
Serial Clock .............................................................. 237
Serial Data In ........................................................... 237
Serial Data Out ........................................................ 237
Slave Mode .............................................................. 244
Slave Select ............................................................. 237
Slave Select Synchronization .................................. 244
SPI Clock ................................................................. 243
SSPxBUF Register .................................................. 243
SSPxSR Register ..................................................... 243
Typical Connection .................................................. 242
SSPOV ............................................................................. 274
SSPOV Status Flag ......................................................... 274
SSPxSTAT Register
R/W Bit ............................................................. 253, 256
SSx .................................................................................. 237
Stack Full/Underflow Resets .............................................. 73
SUBFSR .......................................................................... 393
SUBFWB .......................................................................... 382
SUBLW ............................................................................ 383
SUBULNK ........................................................................ 393
SUBWF ............................................................................ 383
SUBWFB .......................................................................... 384
SWAPF ............................................................................ 384
T
Table Pointer
Operations with TBLRD, TBLWT ............................... 98
Table Reads/Table Writes ................................................. 73
TBLRD ............................................................................. 385
TBLWT ............................................................................ 386
Time-out in Various Situations (table) ................................ 58
Timer0 ............................................................................. 193
Associated Registers ............................................... 195
Operation ................................................................. 194
Overflow Interrupt .................................................... 195
Prescaler ................................................................. 195
Switching Assignment ..................................... 195
Prescaler Assignment (PSA Bit) .............................. 195
Prescaler Select (T0PS2:T0PS0 Bits) ..................... 195
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode ............................ 194
Source Edge Select (T0SE Bit) ............................... 194
Source Select (T0CS Bit) ........................................ 194
Timer1 ............................................................................. 197
16-Bit Read/Write Mode .......................................... 199
Associated Registers ............................................... 202
Considerations in Asynchronous Counter Mode ..... 201
Interrupt ................................................................... 200
Operation ................................................................. 198
Oscillator .......................................................... 197, 199
Layout Considerations ..................................... 199
Oscillator, as Secondary Clock .................................. 39
Resetting, Using the ECCPx Special
Event Trigger ................................................... 200
Special Event Trigger (ECCP) ................................. 223
TMR1H Register ...................................................... 197
TMR1L Register ...................................................... 197
Use as a Clock Source ............................................ 199
Use as a Real-Time Clock ....................................... 200
Timer2 ............................................................................. 203
Associated Registers ............................................... 204
Interrupt ................................................................... 204
Operation ................................................................. 203
Output ...................................................................... 204
PR2 Register ........................................................... 224
TMR2 to PR2 Match Interrupt .................................. 224
Timer3 ............................................................................. 205
16-Bit Read/Write Mode .......................................... 207
Associated Registers ............................................... 207
Operation ................................................................. 206
Oscillator .......................................................... 205, 207
Overflow Interrupt ............................................ 205, 207
Special Event Trigger (ECCPx) ............................... 207
TMR3H Register ...................................................... 205
TMR3L Register ...................................................... 205
Timer4 ............................................................................. 209
Associated Registers ............................................... 210
Operation ................................................................. 209
Output ...................................................................... 210
Postscaler. See Postscaler, Timer4.
PR4 Register ........................................................... 209
Prescaler. See Prescaler, Timer4.
TMR4 Register ........................................................ 209
TMR4 to PR4 Match Interrupt .......................... 209, 210
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